2014 Fifth International Symposium on Electronic System Design
Latest Publications

TOTAL DOCUMENTS

61

(FIVE YEARS 0)

H-INDEX

3

(FIVE YEARS 0)

Published By IEEE

9781479969654

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Hardware Implementation and Testing of Log-MAPP Decoder Based on Novel Un-grouped Sliding-Window Technique

2014 Fifth International Symposium on Electronic System Design ◽

10.1109/ised.2014.42 ◽

2014 ◽

Author(s):

Rahul Shrestha ◽

Roy Paily

Keyword(s):

Hardware Implementation ◽

Sliding Window ◽

Window Technique

Download Full-text

Design of Fault Tolerant Universal Logic in QCA

2014 Fifth International Symposium on Electronic System Design ◽

10.1109/ised.2014.41 ◽

2014 ◽

Author(s):

Bibhash Sen ◽

Rijoy Mukherjee ◽

Rajdeep Kumar Nath ◽

Biplab K. Sikdar

Keyword(s):

Fault Tolerant ◽

Universal Logic

Download Full-text

Low Energy and Area Efficient Nonbinary Capacitor Array Based SAR ADC

2014 Fifth International Symposium on Electronic System Design ◽

10.1109/ised.2014.19 ◽

2014 ◽

Author(s):

D.N. Jagadish ◽

M.S. Bhat

Keyword(s):

Sar Adc ◽

Capacitor Array ◽

Download Full-text

An Improved Multi-band Speech Enhancement Utilizing Masking Properties of Human Hearing System

2014 Fifth International Symposium on Electronic System Design ◽

10.1109/ised.2014.38 ◽

2014 ◽

Author(s):

Navneet Upadhyay

Keyword(s):

Speech Enhancement ◽

Human Hearing ◽

Hearing System ◽

Download Full-text

A New Dynamic Library Based IC Design Automation Methodology Using Functional Symmetry with NPN Class Representation Approach to Reduce NRE Costs and Time-to-Market

2014 Fifth International Symposium on Electronic System Design ◽

10.1109/ised.2014.31 ◽

2014 ◽

Author(s):

Srinivas Sabbavarapu ◽

Karunakar Reddy Basireddy ◽

Amit Acharyya

Keyword(s):

Design Automation ◽

Ic Design ◽

Time To Market ◽

Dynamic Library ◽

Functional Symmetry ◽

Class Representation

Download Full-text

A New Design of an N-Bit Reversible Arithmetic Logic Unit

2014 Fifth International Symposium on Electronic System Design ◽

10.1109/ised.2014.56 ◽

2014 ◽

Author(s):

Subhankar Pal ◽

Chetan Vudadha ◽

P. Sai Phaneendra ◽

Sreehari Veeramachaneni ◽

Srinivas Mandalika

Keyword(s):

Arithmetic Logic Unit ◽

Download Full-text

Message from the ISED 2014 Chairs

2014 Fifth International Symposium on Electronic System Design ◽

10.1109/ised.2014.5 ◽

2014 ◽

Download Full-text

[Title page i]

2014 Fifth International Symposium on Electronic System Design ◽

10.1109/ised.2014.1 ◽

2014 ◽

Keyword(s):

Download Full-text

A Low Power 8-Bit Asynchronous SAR ADC Design Using Charge Scaling DAC

2014 Fifth International Symposium on Electronic System Design ◽

10.1109/ised.2014.55 ◽

2014 ◽

Author(s):

Anush Bekal ◽

Manish Goswami ◽

B.R. Singh ◽

D. Pal

Keyword(s):

Low Power ◽

Sar Adc ◽

Asynchronous Sar

Download Full-text

Effect of Constant One and Zero, Shared and Non-decomposed Nodes on Runtime and Graph Size of the Shannon Factor Graph (SFG)

2014 Fifth International Symposium on Electronic System Design ◽

10.1109/ised.2014.35 ◽

2014 ◽

Author(s):

Basireddy Karunakar Reddy ◽

Srinivas Sabbavarapu ◽

Amit Acharyya

Keyword(s):

Factor Graph ◽

Download Full-text