2012 International Symposium on Electronic System Design (ISED)
Latest Publications

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Published By IEEE

9781467347044, 9780769549026

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

A Process Variation Tolerant Low Contention Keeper Design for Wide Fan-In Dynamic OR Gate

2012 International Symposium on Electronic System Design (ISED) ◽

10.1109/ised.2012.29 ◽

2012 ◽

Author(s):

Vikas Mahor ◽

Akanksha Chouhan ◽

Manisha Pattanaik

Keyword(s):

Process Variation ◽

Or Gate

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Analysis of Top and Bottom Contact Organic Transistor Performance for Different Technology Nodes

2012 International Symposium on Electronic System Design (ISED) ◽

10.1109/ised.2012.60 ◽

2012 ◽

Cited By ~ 2

Author(s):

Poornima Mittal ◽

Y.S. Negi ◽

R.K. Singh

Keyword(s):

Bottom Contact ◽

Organic Transistor ◽

Technology Nodes

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Recent Developments on Mapping Reversible Circuits to Quantum Gate Libraries

2012 International Symposium on Electronic System Design (ISED) ◽

10.1109/ised.2012.81 ◽

2012 ◽

Cited By ~ 5

Author(s):

D. Michael Miller ◽

Zahra Sasanian

Keyword(s):

Quantum Gate ◽

Reversible Circuits ◽

Recent Developments

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Design of Hardware for Deterministic Nagel-Schreckenberg Traffic Model

2012 International Symposium on Electronic System Design (ISED) ◽

10.1109/ised.2012.74 ◽

2012 ◽

Author(s):

Raju Hazari ◽

Kamalika Bhattacharjee ◽

Sukanta Das

Keyword(s):

Traffic Model

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FPGA Based Efficient Fast FIR Algorithm for Higher Order Digital FIR Filter

2012 International Symposium on Electronic System Design (ISED) ◽

10.1109/ised.2012.40 ◽

2012 ◽

Cited By ~ 1

Author(s):

J. Selvakumar ◽

Vidhyacharan Bhaskar ◽

S. Narendran

Keyword(s):

Fir Filter ◽

Higher Order

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Performance Analysis of Offloading IPsec Processing to Hardware Based Accelerators

2012 International Symposium on Electronic System Design (ISED) ◽

10.1109/ised.2012.53 ◽

2012 ◽

Author(s):

Hemant Agrawal ◽

Yashpal Dutta ◽

Sandeep Malik

Keyword(s):

Performance Analysis

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Reversible Logic Circuit Synthesis Using Genetic Algorithm and Particle Swarm Optimization

2012 International Symposium on Electronic System Design (ISED) ◽

10.1109/ised.2012.71 ◽

2012 ◽

Cited By ~ 5

Author(s):

Papia Manna ◽

Dipak K. Kole ◽

Hafizur Rahaman ◽

Debesh K. Das ◽

Bhargab B. Bhattacharya

Keyword(s):

Genetic Algorithm ◽

Particle Swarm Optimization ◽

Particle Swarm ◽

Reversible Logic ◽

Logic Circuit ◽

Circuit Synthesis ◽

Swarm Optimization

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GPU-based Parallel Implementation of SAR Imaging

2012 International Symposium on Electronic System Design (ISED) ◽

10.1109/ised.2012.35 ◽

2012 ◽

Cited By ~ 2

Author(s):

Xingxing Jin ◽

Seok-Bum Ko

Keyword(s):

Parallel Implementation ◽

Sar Imaging

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Synthesis of Reversible Circuits Using Decision Diagrams

2012 International Symposium on Electronic System Design (ISED) ◽

10.1109/ised.2012.37 ◽

2012 ◽

Cited By ~ 4

Author(s):

Rolf Drechsler ◽

Robert Wille

Keyword(s):

Decision Diagrams ◽

Reversible Circuits

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Fractal Image Compression Using Fast Context Independent HV Partitioning Scheme

2012 International Symposium on Electronic System Design (ISED) ◽

10.1109/ised.2012.13 ◽

2012 ◽

Cited By ~ 4

Author(s):

Utpal Nandi ◽

J. K. Mandal

Keyword(s):

Image Compression ◽

Fractal Image Compression ◽

Fractal Image

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2012 International Symposium on Electronic System Design (ISED)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

A Process Variation Tolerant Low Contention Keeper Design for Wide Fan-In Dynamic OR Gate

Analysis of Top and Bottom Contact Organic Transistor Performance for Different Technology Nodes

Recent Developments on Mapping Reversible Circuits to Quantum Gate Libraries

Design of Hardware for Deterministic Nagel-Schreckenberg Traffic Model

FPGA Based Efficient Fast FIR Algorithm for Higher Order Digital FIR Filter

Performance Analysis of Offloading IPsec Processing to Hardware Based Accelerators

Reversible Logic Circuit Synthesis Using Genetic Algorithm and Particle Swarm Optimization

GPU-based Parallel Implementation of SAR Imaging

Synthesis of Reversible Circuits Using Decision Diagrams

Fractal Image Compression Using Fast Context Independent HV Partitioning Scheme

2012 International Symposium on Electronic System Design (ISED)
Latest Publications