2007 International Conference on Field Programmable Logic and Applications
Latest Publications

TOTAL DOCUMENTS

173

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

9781424410590, 9781424410606

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Implementation of a Barotropic Operator for Ocean Model Simulation using a Reconfigurable Machine

2007 International Conference on Field Programmable Logic and Applications ◽

10.1109/fpl.2007.4380723 ◽

2007 ◽

Cited By ~ 2

Author(s):

Sayaka Shida ◽

Yuichiro Shibata ◽

Kiyoshi Oguri ◽

Duncan A. Buell

Keyword(s):

Model Simulation ◽

Ocean Model

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Compact AES-Based Architecture for Symmetric Encryption, Hash Function, and Random Number Generation

2007 International Conference on Field Programmable Logic and Applications ◽

10.1109/fpl.2007.4380694 ◽

2007 ◽

Cited By ~ 9

Author(s):

Ralf Laue ◽

Oliver Kelm ◽

Sebastian Schipp ◽

Abdulhadi Shoufan ◽

Sorin A. Huss

Keyword(s):

Hash Function ◽

Random Number ◽

Random Number Generation ◽

Symmetric Encryption ◽

Number Generation

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An FPGA Solver for Very Large SAT Problems

2007 International Conference on Field Programmable Logic and Applications ◽

10.1109/fpl.2007.4380697 ◽

2007 ◽

Cited By ~ 1

Author(s):

Kenji Kanazawa ◽

Tsutomu Maruyama

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A Banded Smith-Waterman FPGA Accelerator for Mercury BLASTP

2007 International Conference on Field Programmable Logic and Applications ◽

10.1109/fpl.2007.4380764 ◽

2007 ◽

Cited By ~ 16

Author(s):

Brandon Harris ◽

Arpith C. Jacob ◽

Joseph M. Lancaster ◽

Jeremy Buhler ◽

Roger D. Chamberlain

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An Effective Automatic Memory Allocation Algorithm Based on Schedule Length in a Novel C to FPGA Compiler

2007 International Conference on Field Programmable Logic and Applications ◽

10.1109/fpl.2007.4380759 ◽

2007 ◽

Author(s):

Kristopher D. Peterson ◽

Justin L. Tripp

Keyword(s):

Memory Allocation ◽

Allocation Algorithm ◽

Schedule Length ◽

Automatic Memory

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Soft IP Core Implementation of Recursive Least Squares Filter using Only Multplicative and Additive Operators

2007 International Conference on Field Programmable Logic and Applications ◽

10.1109/fpl.2007.4380725 ◽

2007 ◽

Cited By ~ 1

Author(s):

Gaye Lightbody ◽

Roger Woods ◽

Jonathan Francey

Keyword(s):

Least Squares ◽

Recursive Least Squares ◽

Ip Core ◽

Recursive Least Squares Filter

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The Design of Multitasking Based Applications on Reconfigurable Instruction Cell Based Architectures

2007 International Conference on Field Programmable Logic and Applications ◽

10.1109/fpl.2007.4380687 ◽

2007 ◽

Author(s):

Han Wei ◽

Ioannis Nousias ◽

Mark Muir ◽

Tughrul Arslan ◽

Ahmet T. Erdogan

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Characterizing Effective Memory Bandwidth of Designs with Concurrent High-Performance Computing Cores

2007 International Conference on Field Programmable Logic and Applications ◽

10.1109/fpl.2007.4380726 ◽

2007 ◽

Cited By ~ 2

Author(s):

Andrew G. Schmidt ◽

Ron Sass

Keyword(s):

High Performance Computing ◽

High Performance ◽

Memory Bandwidth ◽

Performance Computing

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A resource optimized SoC Kit for FPGAs

2007 International Conference on Field Programmable Logic and Applications ◽

10.1109/fpl.2007.4380763 ◽

2007 ◽

Cited By ~ 7

Author(s):

Gerald Hempel ◽

Christian Hochberger

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A Design Flow to Map Parallel Applications onto FPGAs

2007 International Conference on Field Programmable Logic and Applications ◽

10.1109/fpl.2007.4380727 ◽

2007 ◽

Cited By ~ 3

Author(s):

Sebastien Le Beux ◽

Philippe Marquet ◽

Jean-Luc Dekeyser

Keyword(s):

Design Flow ◽

Parallel Applications

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2007 International Conference on Field Programmable Logic and ApplicationsLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Implementation of a Barotropic Operator for Ocean Model Simulation using a Reconfigurable Machine

Compact AES-Based Architecture for Symmetric Encryption, Hash Function, and Random Number Generation

An FPGA Solver for Very Large SAT Problems

A Banded Smith-Waterman FPGA Accelerator for Mercury BLASTP

An Effective Automatic Memory Allocation Algorithm Based on Schedule Length in a Novel C to FPGA Compiler

Soft IP Core Implementation of Recursive Least Squares Filter using Only Multplicative and Additive Operators

The Design of Multitasking Based Applications on Reconfigurable Instruction Cell Based Architectures

Characterizing Effective Memory Bandwidth of Designs with Concurrent High-Performance Computing Cores

A resource optimized SoC Kit for FPGAs

A Design Flow to Map Parallel Applications onto FPGAs

2007 International Conference on Field Programmable Logic and Applications
Latest Publications