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Fifteenth International Symposium on Quality Electronic Design
Latest Publications
TOTAL DOCUMENTS
120
(FIVE YEARS 0)
H-INDEX
12
(FIVE YEARS 0)
Published By IEEE
9781479939466, 9781479939459
Latest Documents
Most Cited Documents
Contributed Authors
Related Sources
Related Keywords
Latest Documents
Most Cited Documents
Contributed Authors
Related Sources
Related Keywords
Sub-threshold custom standard cell library validation
Fifteenth International Symposium on Quality Electronic Design
◽
10.1109/isqed.2014.6783334
◽
2014
◽
Author(s):
Bo Liu
◽
Maryam Ashouei
◽
Tobias Gemmeke
◽
Jose Pineda de Gyvez
Keyword(s):
Standard Cell
◽
Standard Cell Library
◽
Cell Library
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Tradeoffs between RTO and RTZ in WCHB QDI asynchronous design
Fifteenth International Symposium on Quality Electronic Design
◽
10.1109/isqed.2014.6783394
◽
2014
◽
Cited By ~ 4
Author(s):
Matheus T. Moreira
◽
Julian J. H. Pontes
◽
Ney L. V. Calazans
Keyword(s):
Asynchronous Design
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Minimizing clock domain crossing in Network on Chip interconnect
Fifteenth International Symposium on Quality Electronic Design
◽
10.1109/isqed.2014.6783339
◽
2014
◽
Author(s):
Parag Kulkarni
◽
Puneet Gupta
◽
Rudy Beraha
Keyword(s):
Network On Chip
◽
On Chip
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A 40-nm resilient cache memory for dynamic variation tolerance with bit-enhancing memory and on-chip diagnosis structures delivering ×91 failure rate improvement
Fifteenth International Symposium on Quality Electronic Design
◽
10.1109/isqed.2014.6783301
◽
2014
◽
Cited By ~ 2
Author(s):
Yohei Nakata
◽
Yuta Kimi
◽
Shunsuke Okumura
◽
Jinwook Jung
◽
Takuya Sawada
◽
...
Keyword(s):
Failure Rate
◽
Cache Memory
◽
Dynamic Variation
◽
Rate Improvement
◽
On Chip
◽
Variation Tolerance
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Integrated particle swarm optimization (i-PSO): An adaptive design space exploration framework for power-performance tradeoff in architectural synthesis
Fifteenth International Symposium on Quality Electronic Design
◽
10.1109/isqed.2014.6783307
◽
2014
◽
Cited By ~ 9
Author(s):
Anirban Sengupta
◽
Vipul Kumar Mishra
Keyword(s):
Particle Swarm Optimization
◽
Design Space Exploration
◽
Adaptive Design
◽
Design Space
◽
Space Exploration
◽
Particle Swarm
◽
Power Performance
◽
Swarm Optimization
◽
Architectural Synthesis
◽
Performance Tradeoff
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Formal verification of safety of polymorphic heterogeneous multi-core architectures
Fifteenth International Symposium on Quality Electronic Design
◽
10.1109/isqed.2014.6783383
◽
2014
◽
Cited By ~ 1
Author(s):
Miroslav N. Velev
◽
Ping Gao
Keyword(s):
Formal Verification
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Specification and formal verification of power gating in processors
Fifteenth International Symposium on Quality Electronic Design
◽
10.1109/isqed.2014.6783382
◽
2014
◽
Cited By ~ 2
Author(s):
Amir Masoud Gharehbaghi
◽
Masahiro Fujita
Keyword(s):
Formal Verification
◽
Power Gating
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Direct finite-element-based solver for 3D-IC thermal analysis via H-matrix representation
Fifteenth International Symposium on Quality Electronic Design
◽
10.1109/isqed.2014.6783351
◽
2014
◽
Cited By ~ 2
Author(s):
Ying-Chi Li
◽
Sheldon. X.-D. Tan
◽
Tan Yu
◽
Xin Huang
◽
Ngai Wong
Keyword(s):
Thermal Analysis
◽
Finite Element
◽
Matrix Representation
◽
3D Ic
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Asymmetric aging of clock networks in power efficient designs
Fifteenth International Symposium on Quality Electronic Design
◽
10.1109/isqed.2014.6783365
◽
2014
◽
Cited By ~ 3
Author(s):
Senthil Arasu
◽
Mehrdad Nourani
◽
Frank Cano
◽
John M. Carulli
◽
Vijay Reddy
Keyword(s):
Clock Networks
◽
Power Efficient
◽
Asymmetric Aging
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Thermal flow sensors based on printed circuit board technology
Fifteenth International Symposium on Quality Electronic Design
◽
10.1109/isqed.2014.6783402
◽
2014
◽
Cited By ~ 4
Author(s):
Thilo Sauter
◽
Thomas Glatzl
◽
Franz Kohl
◽
Harald Steiner
◽
Almir Talic
Keyword(s):
Printed Circuit Board
◽
Circuit Board
◽
Thermal Flow
◽
Flow Sensors
◽
Printed Circuit
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