Proceedings Euro ASIC '92
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84

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Published By IEEE Comput. Soc. Press

0818628456

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A four channel, input-level-tunable data acquisition chip, realized with an analog/digital array for research and education

Proceedings Euro ASIC '92 ◽

10.1109/euasic.1992.228009 ◽

2003 ◽

Cited By ~ 1

Author(s):

H. Acker ◽

S. Schwehr ◽

M. Hauck ◽

T. Persch ◽

J. Vollrath

Keyword(s):

Data Acquisition ◽

Channel Input ◽

Research And Education ◽

Input Level

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Specifying ASICs for complex mechatronic systems

Proceedings Euro ASIC '92 ◽

10.1109/euasic.1992.228018 ◽

2003 ◽

Author(s):

P. Solanti ◽

V. Paulasaari ◽

J. Suutari ◽

H. Tenhunen

Keyword(s):

Mechatronic Systems

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Integrating ASIC and board design-for-testability

Proceedings Euro ASIC '92 ◽

10.1109/euasic.1992.228028 ◽

2003 ◽

Author(s):

M. Kraak

Keyword(s):

Design For Testability

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SETIPIC: electrothermal simulator for power integrated circuits in EDGE environment

Proceedings Euro ASIC '92 ◽

10.1109/euasic.1992.228022 ◽

2003 ◽

Cited By ~ 2

Author(s):

L. Hebrard ◽

C. Klingelhofer ◽

G. Jacquemod ◽

B. Boutherin ◽

M. Le Helley

Keyword(s):

Integrated Circuits

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The U-VLC VLSI implementation of a universal variable length coder

Proceedings Euro ASIC '92 ◽

10.1109/euasic.1992.228039 ◽

2003 ◽

Cited By ~ 1

Author(s):

L. Descamps ◽

G. Lizin

Keyword(s):

Variable Length ◽

Vlsi Implementation ◽

Universal Variable

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Design of a H.261 video codec with 12 Xilinx LCAs

Proceedings Euro ASIC '92 ◽

10.1109/euasic.1992.227995 ◽

2003 ◽

Author(s):

A.M. Praden ◽

E. Jouve ◽

F. Albert ◽

M. Dumas ◽

E. Siffredi

Keyword(s):

Video Codec

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FSM-based test generation methods-a survey

Proceedings Euro ASIC '92 ◽

10.1109/euasic.1992.228025 ◽

2003 ◽

Author(s):

P.R. Menon

Keyword(s):

Test Generation

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Using standard-cell design methodologies on a gate-array base

Proceedings Euro ASIC '92 ◽

10.1109/euasic.1992.227989 ◽

2003 ◽

Author(s):

D. Brasen ◽

J. Shiffer ◽

M. Hartoog ◽

S. Ashtaputre

Keyword(s):

Cell Design ◽

Standard Cell ◽

Design Methodologies ◽

Gate Array

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Automatic synthesis on table lookup-based PGAs

Proceedings Euro ASIC '92 ◽

10.1109/euasic.1992.228063 ◽

2003 ◽

Cited By ~ 1

Author(s):

B. Babba ◽

M. Crastes

Keyword(s):

Automatic Synthesis ◽

Table Lookup

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Interactive register transfer level synthesis using library blocks

Proceedings Euro ASIC '92 ◽

10.1109/euasic.1992.228059 ◽

2003 ◽

Cited By ~ 2

Author(s):

A. Mignotte ◽

M.-C. Bertrand ◽

M. Crastes ◽

J. Fron ◽

J. Rampon

Keyword(s):

Register Transfer Level ◽

Register Transfer

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