2007 IEEE International Symposium on Circuits and Systems
Latest Publications

TOTAL DOCUMENTS

1029

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

1424409209

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Noncoherent Correlation-Based Communication Systems Choosing Different Chaotic Maps

2007 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2007.378571 ◽

2007 ◽

Cited By ~ 4

Author(s):

Shintaro Arai ◽

Yoshifumi Nishio

Keyword(s):

Communication Systems ◽

Chaotic Maps

Boundaries Between Fast-and Slow-Scale Bifurcations in Parallel-Connected Buck Converters

2007 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2007.377948 ◽

2007 ◽

Cited By ~ 3

Author(s):

Yuehui Huang ◽

Herbert H. C. Iu ◽

Chi K. Tse

Keyword(s):

Buck Converters

An Adaptive Step-size Order Statistic Time Domain Equaliser for Discrete Multitone Systems

2007 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2007.378418 ◽

2007 ◽

Cited By ~ 5

Author(s):

Suchada Sitjongsataporn ◽

Peerapol Yuvapoositanon

Keyword(s):

Order Statistic ◽

Time Domain ◽

Step Size ◽

Adaptive Step Size ◽

Discrete Multitone ◽

Adaptive Step

Direct Batch Evaluation of Desirable Eigenvectors of the DFT Matrix by Constrained Optimization

2007 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2007.378033 ◽

2007 ◽

Author(s):

Magdy Tawfik Hanna

Keyword(s):

Constrained Optimization

A Fast 3D-BSG Algorithm for 3D Packing Problem

2007 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2007.378499 ◽

2007 ◽

Cited By ~ 5

Author(s):

Lingyi Zhang ◽

Sheqin Dong ◽

Xianlong Hong ◽

Yuchun Ma

Keyword(s):

Packing Problem ◽

3D Packing

A Novel Design Methodology of the On-Chip Power Distribution Network Enhancing the Performance and Suppressing EMI of the SoC

2007 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2007.378049 ◽

2007 ◽

Cited By ~ 3

Author(s):

Hirokazu Tohya ◽

Noritaka Toya

Keyword(s):

Power Distribution ◽

Design Methodology ◽

Distribution Network ◽

Power Distribution Network ◽

On Chip ◽

Novel Design

Efficient Color Space Conversion using Custom Instruction in a RISC Processor

2007 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2007.378204 ◽

2007 ◽

Cited By ~ 4

Author(s):

Muhammad Bilal ◽

Shahid Masud

Keyword(s):

Color Space ◽

Custom Instruction ◽

Color Space Conversion ◽

Risc Processor

Above Threshold pFET InjectionModeling intended for ProgrammingFloating-Gate Systems

2007 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2007.378709 ◽

2007 ◽

Cited By ~ 3

Author(s):

Paul Hasler ◽

Arindam Basu ◽

Scott Koziol

Design of a Low Jitter Multi-Phase Realigned PLL in submicronic CMOS technology

2007 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2007.378744 ◽

2007 ◽

Cited By ~ 1

Author(s):

Regis Roubadia ◽

Sami Ajram ◽

Guy Cathebras

Keyword(s):

Cmos Technology ◽

Low Jitter ◽

Multi Phase

Holographic memory reconfigurable VLSI

2007 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2007.378474 ◽

2007 ◽

Cited By ~ 1

Author(s):

Minoru Watanabe ◽

Fuminori Kobayashi

Keyword(s):

Holographic Memory

2007 IEEE International Symposium on Circuits and SystemsLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Noncoherent Correlation-Based Communication Systems Choosing Different Chaotic Maps

Boundaries Between Fast-and Slow-Scale Bifurcations in Parallel-Connected Buck Converters

An Adaptive Step-size Order Statistic Time Domain Equaliser for Discrete Multitone Systems

Direct Batch Evaluation of Desirable Eigenvectors of the DFT Matrix by Constrained Optimization

A Fast 3D-BSG Algorithm for 3D Packing Problem

A Novel Design Methodology of the On-Chip Power Distribution Network Enhancing the Performance and Suppressing EMI of the SoC

Efficient Color Space Conversion using Custom Instruction in a RISC Processor

Above Threshold pFET InjectionModeling intended for ProgrammingFloating-Gate Systems

Design of a Low Jitter Multi-Phase Realigned PLL in submicronic CMOS technology

Holographic memory reconfigurable VLSI

2007 IEEE International Symposium on Circuits and Systems
Latest Publications