Proceedings of International Conference on Application Specific Array Processors (ASAP '93)
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Response-pipelined CAM chips - Building blocks for large associated arrays

Proceedings of International Conference on Application Specific Array Processors (ASAP '93) ◽

10.1109/asap.1993.397131 ◽

2002 ◽

Author(s):

K. Ghose

Keyword(s):

Building Blocks

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Node merging: A transformation on bit-level dependence graphs for efficient VLSI array design

Proceedings of International Conference on Application Specific Array Processors (ASAP '93) ◽

10.1109/asap.1993.397165 ◽

2002 ◽

Author(s):

B. Jung ◽

W. Burleson

Keyword(s):

Array Design ◽

Dependence Graphs ◽

Vlsi Array

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An efficient algorithm for image-template product on SIMD mesh connected computers

Proceedings of International Conference on Application Specific Array Processors (ASAP '93) ◽

10.1109/asap.1993.397149 ◽

2002 ◽

Cited By ~ 3

Author(s):

H. Shi ◽

G.X. Ritter ◽

J.N. Wilson

Keyword(s):

Efficient Algorithm

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A period-processor-time-minimal schedule for cubical mesh algorithms

Proceedings of International Conference on Application Specific Array Processors (ASAP '93) ◽

10.1109/asap.1993.397150 ◽

2002 ◽

Cited By ~ 1

Author(s):

C. Scheiman ◽

P. Cappello

Keyword(s):

Processor Time

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A wavefront array processor for on the fly processing of digital video streams

Proceedings of International Conference on Application Specific Array Processors (ASAP '93) ◽

10.1109/asap.1993.397124 ◽

2002 ◽

Cited By ~ 1

Author(s):

G. Quenot ◽

C. Coutelle ◽

J. Serot ◽

B. Zavidovique

Keyword(s):

Digital Video ◽

Array Processor ◽

Video Streams

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A real-time systolic algorithm for on-the-fly hidden surface removal

Proceedings of International Conference on Application Specific Array Processors (ASAP '93) ◽

10.1109/asap.1993.397148 ◽

2002 ◽

Author(s):

T. Risset ◽

S.W. Song

Keyword(s):

Real Time ◽

Systolic Algorithm ◽

Hidden Surface Removal ◽

Surface Removal

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Resource constrained scheduling of uniform algorithm

Proceedings of International Conference on Application Specific Array Processors (ASAP '93) ◽

10.1109/asap.1993.397118 ◽

2002 ◽

Cited By ~ 6

Author(s):

L. Thiele

Keyword(s):

Resource Constrained

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Systolic normalization of rational numbers

Proceedings of International Conference on Application Specific Array Processors (ASAP '93) ◽

10.1109/asap.1993.397170 ◽

2002 ◽

Cited By ~ 3

Author(s):

T. Jebelean

Keyword(s):

Rational Numbers

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Design of a VLSI circuit for on-line evaluation of several elementary functions using their Taylor expansions

Proceedings of International Conference on Application Specific Array Processors (ASAP '93) ◽

10.1109/asap.1993.397172 ◽

2002 ◽

Cited By ~ 1

Author(s):

J.-C. Bajard ◽

A. Guyot ◽

J.-M. Muller ◽

A. Skaf

Keyword(s):

Vlsi Circuit ◽

Elementary Functions ◽

Taylor Expansions ◽

On Line

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Heterogeneous BISR techniques for yield and reliability enhancement using high level synthesis transformations

Proceedings of International Conference on Application Specific Array Processors (ASAP '93) ◽

10.1109/asap.1993.397166 ◽

2002 ◽

Cited By ~ 2

Author(s):

M.M. Potkonjak ◽

L.M. Guerra ◽

J.M. Rabaey

Keyword(s):

High Level Synthesis ◽

Reliability Enhancement ◽

High Level

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Proceedings of International Conference on Application Specific Array Processors (ASAP '93)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Response-pipelined CAM chips - Building blocks for large associated arrays

Node merging: A transformation on bit-level dependence graphs for efficient VLSI array design

An efficient algorithm for image-template product on SIMD mesh connected computers

A period-processor-time-minimal schedule for cubical mesh algorithms

A wavefront array processor for on the fly processing of digital video streams

A real-time systolic algorithm for on-the-fly hidden surface removal

Resource constrained scheduling of uniform algorithm

Systolic normalization of rational numbers

Design of a VLSI circuit for on-line evaluation of several elementary functions using their Taylor expansions

Heterogeneous BISR techniques for yield and reliability enhancement using high level synthesis transformations

Proceedings of International Conference on Application Specific Array Processors (ASAP '93)
Latest Publications