VLSI Signal Processing, IX
Latest Publications

TOTAL DOCUMENTS

49

(FIVE YEARS 0)

H-INDEX

9

(FIVE YEARS 0)

Published By IEEE

0780331346

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

A novel architecture and processor-level design based on a new matching criterion for video compression

VLSI Signal Processing, IX ◽

10.1109/vlsisp.1996.558378 ◽

2002 ◽

Cited By ~ 1

Author(s):

Hangu Yeo ◽

Yu Hen Hu

Keyword(s):

Video Compression ◽

Matching Criterion ◽

Level Design

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Design issues for very-long-instruction-word VLSI video signal processors

VLSI Signal Processing, IX ◽

10.1109/vlsisp.1996.558307 ◽

2002 ◽

Cited By ~ 12

Author(s):

S. Dutta ◽

A. Wolfe ◽

W. Wolf ◽

K.J. O'Connor

Keyword(s):

Video Signal ◽

Design Issues ◽

Very Long Instruction Word ◽

Signal Processors

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An area effective standard cell based channel decoder LSI for digital satellite TV broadcasting

VLSI Signal Processing, IX ◽

10.1109/vlsisp.1996.558366 ◽

2002 ◽

Cited By ~ 3

Author(s):

T. Kamada ◽

T. Fukuoka ◽

Y. Nakai ◽

Y. Nakakura ◽

K. Ueda ◽

...

Keyword(s):

Standard Cell ◽

Tv Broadcasting

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Recent advances in mobile video communications

VLSI Signal Processing, IX ◽

10.1109/vlsisp.1996.558272 ◽

2002 ◽

Author(s):

B. Girod ◽

K.B. Younes ◽

N. Faerber ◽

E. Steinbach

Keyword(s):

Mobile Video ◽

Video Communications ◽

Recent Advances

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Parallel and pipelined architecture designs for distributed arithmetic-based recursive digital filters

VLSI Signal Processing, IX ◽

10.1109/vlsisp.1996.558279 ◽

2002 ◽

Cited By ~ 2

Author(s):

Yin-Tsung Hwang ◽

Ching-Long Su

Keyword(s):

Digital Filters ◽

Distributed Arithmetic ◽

Pipelined Architecture ◽

Recursive Digital Filters

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Floating-point nonlinear DSP coprocessor cell-two cycle chip

VLSI Signal Processing, IX ◽

10.1109/vlsisp.1996.558281 ◽

2002 ◽

Cited By ~ 6

Author(s):

V.K. Jain ◽

L. Lin

Keyword(s):

Floating Point

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Model-based architectural design and verification of scalable embedded DSP systems-a RASSP approach

VLSI Signal Processing, IX ◽

10.1109/vlsisp.1996.558314 ◽

2002 ◽

Author(s):

L.-R. Dung ◽

V.K. Madisetti ◽

J.W. Hines

Keyword(s):

Architectural Design ◽

Model Based ◽

Embedded Dsp ◽

Dsp Systems

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Hardware design of a Hough transform based 2-D motion estimation system

VLSI Signal Processing, IX ◽

10.1109/vlsisp.1996.558368 ◽

2002 ◽

Author(s):

Hsiang-Ling Li ◽

C. Chakrabarti

Keyword(s):

Motion Estimation ◽

Hough Transform ◽

Hardware Design ◽

Estimation System

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Scalability of 2-D wavelet transform algorithms: analytical and experimental results on coarse-grained parallel computers

VLSI Signal Processing, IX ◽

10.1109/vlsisp.1996.558370 ◽

2002 ◽

Cited By ~ 13

Author(s):

J.N. Patel ◽

L.H. Jamieson ◽

A.A. Khokhar

Keyword(s):

Wavelet Transform ◽

Parallel Computers ◽

Experimental Results ◽

Coarse Grained

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Divide-and-conquer techniques for global throughput optimization

VLSI Signal Processing, IX ◽

10.1109/vlsisp.1996.558313 ◽

2002 ◽

Cited By ~ 5

Author(s):

L. Guerra ◽

M. Potkonjak ◽

J. Rabaey

Keyword(s):

Divide And Conquer ◽

Throughput Optimization

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