[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors
Latest Publications

TOTAL DOCUMENTS

129

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE Comput. Soc. Press

0818622709

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

High-performance VLSI processor for robot inverse dynamics computation

[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors ◽

10.1109/iccd.1991.139984 ◽

2002 ◽

Cited By ~ 1

Author(s):

S. Kittichaikoonkit ◽

M. Kameyama ◽

T. Higuchi

Keyword(s):

High Performance ◽

Inverse Dynamics

A multiprocessor architecture for circuit simulation

[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors ◽

10.1109/iccd.1991.139987 ◽

2002 ◽

Cited By ~ 1

Author(s):

J. Trotter ◽

P. Agrawal

Keyword(s):

Circuit Simulation ◽

Multiprocessor Architecture

Early performance estimation of super scalar machine models

[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors ◽

10.1109/iccd.1991.139926 ◽

2002 ◽

Cited By ~ 7

Author(s):

P. Bose

Keyword(s):

Performance Estimation ◽

Early Performance

Illustration of the SFG-tracing multi-level behavioral verification methodology, by the correctness proof of a high to low level synthesis application in Cathedral-II

[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors ◽

10.1109/iccd.1991.139913 ◽

2002 ◽

Cited By ~ 5

Author(s):

M. Genoe ◽

L. Claesen ◽

E. Verlind ◽

F. Proesmans ◽

H. De Man

Keyword(s):

Correctness Proof ◽

Low Level ◽

Multi Level ◽

Verification Methodology

A layout compaction algorithm with multiple grid constraints

[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors ◽

10.1109/iccd.1991.139837 ◽

2002 ◽

Cited By ~ 3

Author(s):

J. Lee

A genetic algorithm for global improvement of macrocell layouts

[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors ◽

10.1109/iccd.1991.139905 ◽

2002 ◽

Cited By ~ 4

Author(s):

K. Glasmacher ◽

A. Hess ◽

G. Zimmermann

Keyword(s):

Genetic Algorithm ◽

Global Improvement

A tag coprocessor architecture for symbolic languages

[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors ◽

10.1109/iccd.1991.139922 ◽

2002 ◽

Author(s):

V. Fuentes-Sanchez ◽

P.Y.K. Cheung

Overview of the Monsoon project

[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors ◽

10.1109/iccd.1991.139869 ◽

2002 ◽

Cited By ~ 12

Author(s):

K.R. Traub ◽

M.J. Beckerle ◽

G.M. Papadopoulos ◽

J.E. Hicks ◽

J. Young

Concurrent error detection in array dividers by alternating input data

[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors ◽

10.1109/iccd.1991.139858 ◽

2002 ◽

Cited By ~ 5

Author(s):

C.-L. Wey

Keyword(s):

Error Detection ◽

Input Data ◽

Concurrent Error Detection

Fault-tolerant model of neural computing

[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors ◽

10.1109/iccd.1991.139860 ◽

2002 ◽

Cited By ~ 1

Author(s):

L.-C. Chu

Keyword(s):

Fault Tolerant ◽

Neural Computing

[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and ProcessorsLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE Comput. Soc. Press

High-performance VLSI processor for robot inverse dynamics computation

A multiprocessor architecture for circuit simulation

Early performance estimation of super scalar machine models

Illustration of the SFG-tracing multi-level behavioral verification methodology, by the correctness proof of a high to low level synthesis application in Cathedral-II

A layout compaction algorithm with multiple grid constraints

A genetic algorithm for global improvement of macrocell layouts

A tag coprocessor architecture for symbolic languages

Overview of the Monsoon project

Concurrent error detection in array dividers by alternating input data

Fault-tolerant model of neural computing

[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors
Latest Publications