2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
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9781509035618

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2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsi-soc.2016.7753410 ◽

2016 ◽

A low-power analog front-end neural acquisition design for seizure detection

2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsi-soc.2016.7753541 ◽

2016 ◽

Cited By ~ 1

Author(s):

Mohammad Tohidi ◽

Jens K. Madsen ◽

Martijn J. R. Heck ◽

Farshad Moradi

Keyword(s):

Low Power ◽

Seizure Detection ◽

Front End ◽

Analog Front End

Comparative analysis of redundancy schemes for soft-error detection in low-cost space applications

2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsi-soc.2016.7753573 ◽

2016 ◽

Cited By ~ 3

Author(s):

Charlotte Frenkel ◽

Jean-Didier Legat ◽

David Bol

Keyword(s):

Comparative Analysis ◽

Error Detection ◽

Low Cost ◽

Soft Error ◽

Space Applications

Speeding up safety verification by fault abstraction and simulation to transaction level

2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsi-soc.2016.7753547 ◽

2016 ◽

Cited By ~ 4

Author(s):

Bogdan-Andrei Tabacaru ◽

Moomen Chaari ◽

Wolfgang Ecker ◽

Thomas Kruse ◽

Cristiano Novello

Keyword(s):

Safety Verification ◽

Transaction Level

XbarGen: A memristor based boolean logic synthesis tool

2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsi-soc.2016.7753567 ◽

2016 ◽

Cited By ~ 6

Author(s):

Marcello Traiola ◽

Mario Barbareschi ◽

Antonino Mazzeo ◽

Alberto Bosio

Keyword(s):

Logic Synthesis ◽

Boolean Logic ◽

Synthesis Tool

A compact, ultra-low power AES-CCM IP core for wireless body area networks

2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsi-soc.2016.7753566 ◽

2016 ◽

Cited By ~ 1

Author(s):

Van-Phuc Hoang ◽

Thi-Thanh-Dung Phan ◽

Van-Lan Dao ◽

Cong-Kha Pham

Keyword(s):

Low Power ◽

Body Area Networks ◽

Wireless Body Area Networks ◽

Ip Core ◽

Body Area ◽

Ultra Low Power

A 1.62 µW 8-channel ultra-high input impedance EEG amplifier for dry and non-contact biopotential recording applications

2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsi-soc.2016.7753539 ◽

2016 ◽

Cited By ~ 1

Author(s):

Mahshid Nasserian ◽

Ali Peiravi ◽

Farshad Moradi

Keyword(s):

Input Impedance ◽

High Input ◽

High Input Impedance ◽

Biopotential Recording

Power and energy reduction of racetrack-based caches by exploiting shared shift operations

2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsi-soc.2016.7753563 ◽

2016 ◽

Cited By ~ 1

Author(s):

Seyed Saber Nabavi Larimi ◽

Mehdi Kamal ◽

Ali Afzali-Kusha ◽

Hamid Mahmoodi

Keyword(s):

Energy Reduction ◽

Power And Energy

Stimuli generation through invariant mining for black-box verification

2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsi-soc.2016.7753557 ◽

2016 ◽

Author(s):

Luca Piccolboni ◽

Graziano Pravadelli

Keyword(s):

Black Box

Opportunistic circuit-switching for energy efficient on-chip networks

2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsi-soc.2016.7753550 ◽

2016 ◽

Cited By ~ 1

Author(s):

Yuan He ◽

Masaaki Kondo

Keyword(s):

Energy Efficient ◽

Circuit Switching ◽

On Chip

2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Table of contents

A low-power analog front-end neural acquisition design for seizure detection

Comparative analysis of redundancy schemes for soft-error detection in low-cost space applications

Speeding up safety verification by fault abstraction and simulation to transaction level

XbarGen: A memristor based boolean logic synthesis tool

A compact, ultra-low power AES-CCM IP core for wireless body area networks

A 1.62 µW 8-channel ultra-high input impedance EEG amplifier for dry and non-contact biopotential recording applications

Power and energy reduction of racetrack-based caches by exploiting shared shift operations

Stimuli generation through invariant mining for black-box verification

Opportunistic circuit-switching for energy efficient on-chip networks

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2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Table of contents

A low-power analog front-end neural acquisition design for seizure detection

Comparative analysis of redundancy schemes for soft-error detection in low-cost space applications

Speeding up safety verification by fault abstraction and simulation to transaction level

XbarGen: A memristor based boolean logic synthesis tool

A compact, ultra-low power AES-CCM IP core for wireless body area networks

A 1.62 µW 8-channel ultra-high input impedance EEG amplifier for dry and non-contact biopotential recording applications

Power and energy reduction of racetrack-based caches by exploiting shared shift operations

Stimuli generation through invariant mining for black-box verification

Opportunistic circuit-switching for energy efficient on-chip networks

2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
Latest Publications