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2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
Latest Publications
TOTAL DOCUMENTS
54
(FIVE YEARS 0)
H-INDEX
6
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Published By IEEE
9781509035618
Latest Documents
Most Cited Documents
Contributed Authors
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Related Keywords
Latest Documents
Most Cited Documents
Contributed Authors
Related Sources
Related Keywords
Comparative analysis of redundancy schemes for soft-error detection in low-cost space applications
2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
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10.1109/vlsi-soc.2016.7753573
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2016
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Cited By ~ 3
Author(s):
Charlotte Frenkel
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Jean-Didier Legat
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David Bol
Keyword(s):
Comparative Analysis
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Error Detection
◽
Low Cost
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Soft Error
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Space Applications
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A low-power analog front-end neural acquisition design for seizure detection
2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
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10.1109/vlsi-soc.2016.7753541
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2016
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Cited By ~ 1
Author(s):
Mohammad Tohidi
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Jens K. Madsen
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Martijn J. R. Heck
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Farshad Moradi
Keyword(s):
Low Power
◽
Seizure Detection
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Front End
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Analog Front End
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Table of contents
2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
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10.1109/vlsi-soc.2016.7753410
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2016
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Download Full-text
Speeding up safety verification by fault abstraction and simulation to transaction level
2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
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10.1109/vlsi-soc.2016.7753547
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2016
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Cited By ~ 4
Author(s):
Bogdan-Andrei Tabacaru
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Moomen Chaari
◽
Wolfgang Ecker
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Thomas Kruse
◽
Cristiano Novello
Keyword(s):
Safety Verification
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Transaction Level
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XbarGen: A memristor based boolean logic synthesis tool
2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
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10.1109/vlsi-soc.2016.7753567
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2016
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Cited By ~ 6
Author(s):
Marcello Traiola
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Mario Barbareschi
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Antonino Mazzeo
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Alberto Bosio
Keyword(s):
Logic Synthesis
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Boolean Logic
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Synthesis Tool
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A compact, ultra-low power AES-CCM IP core for wireless body area networks
2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
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10.1109/vlsi-soc.2016.7753566
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2016
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Cited By ~ 1
Author(s):
Van-Phuc Hoang
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Thi-Thanh-Dung Phan
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Van-Lan Dao
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Cong-Kha Pham
Keyword(s):
Low Power
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Body Area Networks
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Wireless Body Area Networks
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Ip Core
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Body Area
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Ultra Low Power
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A 1.62 µW 8-channel ultra-high input impedance EEG amplifier for dry and non-contact biopotential recording applications
2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
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10.1109/vlsi-soc.2016.7753539
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2016
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Cited By ~ 1
Author(s):
Mahshid Nasserian
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Ali Peiravi
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Farshad Moradi
Keyword(s):
Input Impedance
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High Input
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High Input Impedance
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Biopotential Recording
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Power and energy reduction of racetrack-based caches by exploiting shared shift operations
2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
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10.1109/vlsi-soc.2016.7753563
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2016
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Cited By ~ 1
Author(s):
Seyed Saber Nabavi Larimi
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Mehdi Kamal
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Ali Afzali-Kusha
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Hamid Mahmoodi
Keyword(s):
Energy Reduction
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Power And Energy
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Opportunistic circuit-switching for energy efficient on-chip networks
2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
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10.1109/vlsi-soc.2016.7753550
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2016
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Cited By ~ 1
Author(s):
Yuan He
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Masaaki Kondo
Keyword(s):
Energy Efficient
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Circuit Switching
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On Chip
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Frequency domain characterization of batteries for the design of energy storage subsystems
2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
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10.1109/vlsi-soc.2016.7753548
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2016
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Author(s):
Yukai Chen
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Enrico Macii
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Massimo Poncino
Keyword(s):
Energy Storage
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Frequency Domain
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