A 4GS/s 8‐bit time‐interleaved SAR ADC with an energy‐efficient architecture in 130 nm CMOS

2021 ◽  
Author(s):  
Fredy Solis ◽  
Álvaro Fernández Bocco ◽  
Agustín C. Galetto ◽  
Leandro Passetti ◽  
Mario R. Hueda ◽  
...  
Keyword(s):  
Energy Efficient ◽  
Sar Adc ◽  
Energy Efficient Architecture ◽  
Time Interleaved

An Energy-Efficient Hierarchical Architecture for Time-Interleaved SAR ADC

2019 ◽  
Vol 66 (6) ◽  
pp. 2064-2076 ◽  
Author(s):  
Benjamin T. Reyes ◽  
Laura Biolato ◽  
Agustin C. Galetto ◽  
Leandro Passetti ◽  
Fredy Solis ◽  
...  
Keyword(s):  
Energy Efficient ◽  
Sar Adc ◽  
Hierarchical Architecture ◽  
Time Interleaved

A 4GS/s 8-bit SAR ADC with an Energy-Efficient Time-Interleaved Architecture in 130nm CMOS

2020 ◽  
Author(s):  
Benjamin T. Reyes ◽  
Laura Biolato ◽  
Agustin C. Galetto ◽  
Leandro Passetti ◽  
Fredy Solis ◽  
...  
Keyword(s):  
Energy Efficient ◽  
Sar Adc ◽  
Time Interleaved

A 7-bit 2 GS/s Time-Interleaved SAR ADC With Timing Skew Calibration Based on Current Integrating Sampler

2020 ◽  
pp. 1-12
Author(s):  
Wenning Jiang ◽  
Yan Zhu ◽  
Chi-Hang Chan ◽  
Boris Murmann ◽  
Rui Paulo Martins
Keyword(s):  
Sar Adc ◽  
Time Interleaved ◽  
Timing Skew

An 11b 3.6GS/s time-interleaved SAR ADC in 65nm CMOS

2013 ◽  
Author(s):  
E. Janssen ◽  
K. Doris ◽  
A. Zanikopoulos ◽  
A. Murroni ◽  
G. van der Weide ◽  
...  
Keyword(s):  
Sar Adc ◽  
Time Interleaved

Energy‐efficient sub‐DAC merging scheme for variable resolution SAR ADC

2014 ◽  
Vol 50 (20) ◽  
pp. 1421-1423 ◽  
Author(s):  
S.R. Srinivasan ◽  
P.T. Balsara
Keyword(s):  
Energy Efficient ◽  
Sar Adc ◽  
Variable Resolution

scholarly journals A 2.3 mW 10-bit 170 MS/s Two-Step Binary-Search Assisted Time-Interleaved SAR ADC

2013 ◽  
Vol 48 (8) ◽  
pp. 1783-1794 ◽  
Author(s):  
Si-Seng Wong ◽  
U-Fat Chio ◽  
Yan Zhu ◽  
Sai-Weng Sin ◽  
Seng-Pan U ◽  
...  
Keyword(s):  
Binary Search ◽  
Sar Adc ◽  
Time Interleaved
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