scholarly journals Improving an Industrial Test Generation Tool Using SMT Solver

2016 ◽  
pp. 100-106
Author(s):  
Hao Ren ◽  
Devesh Bhatt ◽  
Jan Hvozdovic
Keyword(s):  
Test Generation ◽  
Industrial Test ◽  
Smt Solver

scholarly journals Using a bounded model checker for test generation: How to kill two birds with one SMT solver

2015 ◽  
Vol 49 (7) ◽  
pp. 466-472 ◽  
Author(s):  
M. Petrov ◽  
K. Gagarski ◽  
M. Belyaev ◽  
V. Itsykson
Keyword(s):  
Test Generation ◽  
Model Checker ◽  
Smt Solver

scholarly journals Using a Bounded Model Checker for Test Generation: How to Kill Two Birds with One SMT-solver

2014 ◽  
Vol 21 (6) ◽  
pp. 83-93
Author(s):  
Maxim Petrov ◽  
Kirill Gagarski ◽  
Mikhail Belyaev ◽  
Vladimir Itsykson
Keyword(s):  
Test Generation ◽  
Model Checker ◽  
Smt Solver

Experimental and industrial test of the combined method for gate roadway supporting

2020 ◽  
pp. 106-115
Author(s):  
O.P. Krukovskyi ◽  
◽  
S.A. Kurnosov ◽  
Yu.Yu. Bulich ◽  
Yu.S. Opryshko ◽  
...  
Keyword(s):  
Industrial Test ◽  
Combined Method

Engineering Theories with Z3

10.29007/x7b4 ◽  
2018 ◽  
Author(s):  
Nikolaj Bjorner
Keyword(s):  
Satisfiability Modulo Theories ◽  
Smt Solver ◽  
Testing Tools ◽  
Software And Hardware ◽  
Design And Testing

Modern Satisfiability Modulo Theories (SMT)solvers are fundamental to many programanalysis, verification, design and testing tools. They are a goodfit for the domain of software and hardware engineering becausethey support many domains that are commonly used by the tools.The meaning of domains are captured by theories that can beaxiomatized or supported by efficient <i>theory solvers</i>.Nevertheless, not all domains are handled by all solvers andmany domains and theories will never be native to any solver.We here explore different theories that extend MicrosoftResearch's SMT solver Z3's basicsupport. Some can be directly encoded or axiomatized,others make use of user theory plug-ins.Plug-ins are a powerful way for tools to supply their custom domains.

Low Power and High Speed Sequential Circuits Test Architecture

2019 ◽  
Vol 12 ◽  
Author(s):  
Ahmed K. Jameil ◽  
Yasir Amer Abbas ◽  
Saad Al-Azawi
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Test Generation ◽  
High Speed ◽  
Fir Filter ◽  
Sequential Circuits ◽  
Fir Filters ◽  
Design Verification ◽  
Sequential Circuit ◽  
Generation Algorithm

Background: The designed circuits are tested for faults detection in fabrication to determine which devices are defective. The design verification is performed to ensure that the circuit performs the required functions after manufacturing. Design verification is regarded as a test form in both sequential and combinational circuits. The analysis of sequential circuits test is more difficult than in the combinational circuit test. However, algorithms can be used to test any type of sequential circuit regardless of its composition. An important sequential circuit is the finite impulse response (FIR) filters that are widely used in digital signal processing applications. Objective: This paper presented a new design under test (DUT) algorithm for 4-and 8-tap FIR filters. Also, the FIR filter and the proposed DUT algorithm is implemented using field programmable gate arrays (FPGA). Method: The proposed test generation algorithm is implemented in VHDL using Xilinx ISE V14.5 design suite and verified by simulation. The test generation algorithm used FIR filtering redundant faults to obtain a set of target faults for DUT. The fault simulation is used in DUT to assess the benefit of test pattern in fault coverage. Results: The proposed technique provides average reductions of 20 % and 38.8 % in time delay with 57.39 % and 75 % reductions in power consumption and 28.89 % and 28.89 % slices reductions for 4- and 8-tap FIR filter, respectively compared to similar techniques. Conclusions: The results of implementation proved that a high speed and low power consumption design can be achieved. Further, the speed of the proposed architecture is faster than that of existing techniques.

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