High-Level Modeling of Multi-user Interactive Applications

2007 ◽  
pp. 153-168 ◽  
Author(s):  
Jan Van den Bergh ◽  
Kris Luyten ◽  
Karin Coninx
Keyword(s):  
Interactive Applications ◽  
High Level Modeling ◽  
High Level

UML Based Design Approach for Storage System of Nano-Satellite

2014 ◽  
Vol 599-601 ◽  
pp. 530-533
Author(s):  
Hong Hao Wang ◽  
Hui Quan Wang ◽  
Zhong He Jin
Keyword(s):  
Storage System ◽  
Unified Modeling Language ◽  
Object Oriented ◽  
Modeling Language ◽  
Nand Flash ◽  
Unified Modeling ◽  
Object Oriented Design ◽  
High Level Modeling ◽  
High Level

Due to the complex timing sequence of NAND flash, a unified design process is urgently required to guarantee the reliability of storage system of nano-satellite. Unified Modeling Language (UML) is a widely used high level modeling language for object-oriented design. This paper adopts the UML as the design and modelling tool in the low level storage system design to elaborate the UML application in each phase of design in detail. The result shows taking UML as the modelling tool results in a clear and unambiguity design, which promotes the reliability and quality of software. At last, the feasibility of object-oriented implementation in C is presented.

From MARTE to Reconfigurable NoCs

2010 ◽  
pp. 135-157
Author(s):  
Imran Rafiq Quadri ◽  
Majdi Elhaji ◽  
Samy Meftali ◽  
Jean-Luc Dekeyser
Keyword(s):  
System Modeling ◽  
Unified Modeling Language ◽  
Modeling And Analysis ◽  
Unified Modeling ◽  
Model Driven ◽  
Abstraction Level ◽  
Management Group ◽  
High Level Modeling ◽  
High Level ◽  
Abstraction Levels

Due to the continuous exponential rise in SoC’s design complexity, there is a critical need to find new seamless methodologies and tools to handle the SoC co-design aspects. We address this issue and propose a novel SoC co-design methodology based on Model Driven Engineering and the MARTE (Modeling and Analysis of Real-Time and Embedded Systems) standard proposed by Object Management Group, to raise the design abstraction levels. Extensions of this standard have enabled us to move from high level specifications to execution platforms such as reconfigurable FPGAs. In this chapter, we present a high level modeling approach that targets modern Network on Chips systems. The overall objective: to perform system modeling at a high abstraction level expressed in Unified Modeling Language (UML); and afterwards, transform these high level models into detailed enriched lower level models in order to automatically generate the necessary code for final FPGA synthesis.

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