A Performance Model for Run-Time Reconfigurable Hardware Accelerator

Lecture Notes in Computer Science - Advanced Parallel Processing Technologies ◽

10.1007/978-3-642-03644-6_5 ◽

2009 ◽

pp. 54-66 ◽

Author(s):

Gang Wang ◽

Du Chen ◽

Jian Chen ◽

Jianliang Ma ◽

Tianzhou Chen

Keyword(s):

Reconfigurable Hardware ◽

Performance Model ◽

Hardware Accelerator ◽

Run Time ◽

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A performance model of automated material handling systems with double closed-loops and shortcuts in 300 mm semiconductor wafer fabrication systems

Journal of Manufacturing Systems ◽

10.1016/j.jmsy.2020.12.006 ◽

2021 ◽

Vol 58 ◽

pp. 316-334

Author(s):

Lihui Wu ◽

Zhongwei Zhang ◽

Jie Zhang ◽

Ray Y. Zhong ◽

Junliang Wang

Keyword(s):

Material Handling ◽

Performance Model ◽

Wafer Fabrication ◽

Semiconductor Wafer ◽

Closed Loops ◽

Material Handling Systems ◽

Semiconductor Wafer Fabrication ◽

Automated Material Handling ◽

Automated Material Handling Systems ◽

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A performance model for maximum ratio combining receivers with adaptive modulation and coding in Rice fading correlated channels

2014 IEEE Symposium on Computers and Communications (ISCC) ◽

10.1109/iscc.2014.6912476 ◽

2014 ◽

Author(s):

Ramiro Samano-Robles ◽

Atilio Gameiro

Keyword(s):

Adaptive Modulation ◽

Performance Model ◽

Adaptive Modulation And Coding ◽

Maximum Ratio Combining ◽

Correlated Channels ◽

Rice Fading ◽

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Run-Time Reconfigurable Hardware-Software Architecture for PID Motor Control IP Cores

IECON 2006 - 32nd Annual Conference on IEEE Industrial Electronics ◽

10.1109/iecon.2006.347526 ◽

2006 ◽

Author(s):

Armando Astarola ◽

Jesus Lazaro ◽

Unai Bidarte ◽

Jaime Jimenez ◽

Jagoba Arias

Keyword(s):

Motor Control ◽

Software Architecture ◽

Reconfigurable Hardware ◽

Run Time ◽

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A performance model of pipelined k-ary n-cubes

IEEE Transactions on Computers ◽

10.1109/12.403724 ◽

1995 ◽

Vol 44 (8) ◽

pp. 1059-1063 ◽

Author(s):

P.T. Gaughan ◽

S. Yalamanchili

Keyword(s):

Performance Model ◽

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A performance model of pedestrian dead reckoning with activity-based location updates

2012 18th IEEE International Conference on Networks (ICON) ◽

10.1109/icon.2012.6506535 ◽

2012 ◽

Author(s):

Mahbub Hassan

Keyword(s):

Dead Reckoning ◽

Performance Model ◽

Pedestrian Dead Reckoning ◽

Location Updates ◽

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Coarse-grained reconfigurable hardware accelerator of machine learning classifiers

2016 International Conference on Systems, Signals and Image Processing (IWSSIP) ◽

10.1109/iwssip.2016.7502737 ◽

2016 ◽

Author(s):

Vuk Vranjkovic ◽

Rastislav Struharik

Keyword(s):

Machine Learning ◽

Reconfigurable Hardware ◽

Coarse Grained ◽

Hardware Accelerator ◽

Machine Learning Classifiers ◽

Learning Classifiers

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Run-Time Management of Reconfigurable Hardware Tasks Using Embedded Linux

2007 International Conference on Field-Programmable Technology ◽

10.1109/fpt.2007.4439251 ◽

2007 ◽

Author(s):

Krzysztof Kosciuszkiewicz ◽

Fearghal Morgan ◽

Krzysztof Kepa

Keyword(s):

Time Management ◽

Embedded Linux ◽

Reconfigurable Hardware ◽

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Resource-Adaptive Model Generation as a Performance Model

Logic Journal of IGPL ◽

10.1093/jigpal/11.4.435 ◽

2003 ◽

Vol 11 (4) ◽

pp. 435-456 ◽

Author(s):

M. Kohlhase

Keyword(s):

Performance Model ◽

Model Generation ◽

Adaptive Model ◽

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Incremental elaboration for run-time reconfigurable hardware designs

Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems - CASES '06 ◽

10.1145/1176760.1176773 ◽

2006 ◽

Author(s):

Arran Derbyshire ◽

Tobias Becker ◽

Wayne Luk

Keyword(s):

Reconfigurable Hardware ◽

Run Time ◽

Hardware Designs

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Multithreading on reconfigurable hardware: a performance evaluation approach of a multicore FPGA architecture

International Journal of High Performance Systems Architecture ◽

10.1504/ijhpsa.2021.10042931 ◽

2021 ◽

Vol 10 (2) ◽

pp. 105

Author(s):

George K. Adam

Keyword(s):

Performance Evaluation ◽

Reconfigurable Hardware ◽

Evaluation Approach ◽

Fpga Architecture ◽

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