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ADL and High Performance Processor Design
Communications in Computer and Information Science - Computer Engineering and Technology
◽
10.1007/978-3-642-35898-2_8
◽
2013
◽
pp. 67-74
Author(s):
Liu Yang
◽
Xiaoqiang Ni
◽
Yusong Tan
◽
Hengzhu Liu
Keyword(s):
High Performance
◽
Processor Design
Download Full-text
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References
A Bus-Encoding Scheme for Crosstalk Elimination in High-Performance Processor Design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
◽
10.1109/tcad.2007.907260
◽
2007
◽
Vol 26
(12)
◽
pp. 2222-2227
◽
Cited By ~ 7
Author(s):
Wen-Wen Hsieh
◽
Po-Yuan Chen
◽
Chun-Yao Wang
◽
TingTing Hwang
Keyword(s):
High Performance
◽
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Encoding Scheme
◽
Bus Encoding
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Crosstalk Elimination
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Principles of High-Performance Processor Design
10.1007/978-3-030-76871-3
◽
2021
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Author(s):
Junichiro Makino
Keyword(s):
High Performance
◽
Processor Design
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Task Force On The Interaction Of Architecture And Compilation Technology For High-performance Single-processor Design
Proceedings of the Thirtieth Hawaii International Conference on System Sciences
◽
10.1109/hicss.1997.667473
◽
2005
◽
Author(s):
Pen-Chung Yew
Keyword(s):
High Performance
◽
Task Force
◽
Processor Design
◽
Single Processor
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Concurrent High Performance Processor Design
Proceedings of the 2018 International Symposium on Physical Design - ISPD '18
◽
10.1145/3177540.3177556
◽
2018
◽
Author(s):
Leon Stok
Keyword(s):
High Performance
◽
Processor Design
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GaAs Technology Insertion In High Performance Digital Signal Processor Design
Nineteeth Asilomar Conference on Circuits, Systems and Computers, 1985.
◽
10.1109/acssc.1985.671444
◽
2005
◽
Author(s):
P.N. Marinos
◽
N. Kanopoulos
Keyword(s):
Digital Signal Processor
◽
High Performance
◽
Digital Signal
◽
Processor Design
◽
Signal Processor
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Versatile processor design for efficiency and high performance
Proceedings International Symposium on Parallel Architectures, Algorithms and Networks. I-SPAN 2000
◽
10.1109/ispan.2000.900295
◽
2002
◽
Author(s):
S.G. Ziavras
Keyword(s):
High Performance
◽
Processor Design
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A bus architecture for crosstalk elimination in high performance processor design
Proceedings of the 4th international conference on Hardware/software codesign and system synthesis - CODES+ISSS '06
◽
10.1145/1176254.1176314
◽
2006
◽
Cited By ~ 2
Author(s):
Wen-Wen Hsieh
◽
Po-Yuan Chen
◽
TingTing Hwang
Keyword(s):
High Performance
◽
Processor Design
◽
Bus Architecture
◽
Crosstalk Elimination
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Power management issues in high performance processor design
Proceedings IEEE Alessandro Volta Memorial Workshop on Low-Power Design
◽
10.1109/lpd.1999.750381
◽
1999
◽
Author(s):
D. Blaauw
Keyword(s):
Power Management
◽
High Performance
◽
Processor Design
◽
Management Issues
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MOVE: a framework for high-performance processor design
Proceedings of the 1991 ACM/IEEE conference on Supercomputing - Supercomputing '91
◽
10.1145/125826.126159
◽
1991
◽
Cited By ~ 43
Author(s):
Henk Corporaal
◽
Hans (J.M.) Mulder
Keyword(s):
High Performance
◽
Processor Design
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A high performance digital neural processor design by Network on Chip architecture
Proceedings of 2011 International Symposium on VLSI Design, Automation and Test
◽
10.1109/vdat.2011.5783621
◽
2011
◽
Author(s):
Dong Yiping
◽
Li Ce
◽
Liu Hui
◽
Watanabe Takahiro
Keyword(s):
High Performance
◽
Network On Chip
◽
Processor Design
◽
On Chip
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