Proceedings of 2011 International Symposium on VLSI Design, Automation and Test
Latest Publications

TOTAL DOCUMENTS

100

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(FIVE YEARS 0)

Published By IEEE

9781424485000

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Asymmetrical ground gating for low leakage and data robust sleep mode in memory banks

Proceedings of 2011 International Symposium on VLSI Design, Automation and Test ◽

10.1109/vdat.2011.5783611 ◽

2011 ◽

Cited By ~ 13

Author(s):

Hailong Jiao ◽

Volkan Kursun

Keyword(s):

Sleep Mode ◽

Low Leakage

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Connected vehicles in a connected world

Proceedings of 2011 International Symposium on VLSI Design, Automation and Test ◽

10.1109/vdat.2011.5783569 ◽

2011 ◽

Cited By ~ 4

Author(s):

Ching-Yao Chan

Keyword(s):

Connected Vehicles

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Design and verification of an integrated current mode switching regulator

Proceedings of 2011 International Symposium on VLSI Design, Automation and Test ◽

10.1109/vdat.2011.5783548 ◽

2011 ◽

Author(s):

Chun-Sheng Huang ◽

Chien-Hung Tsai ◽

Jia-Hui Wang

Keyword(s):

Current Mode ◽

Mode Switching ◽

Switching Regulator

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Accelerating manycore simulation by efficient NoC interconnection partition on FPGA simulation platform

Proceedings of 2011 International Symposium on VLSI Design, Automation and Test ◽

10.1109/vdat.2011.5783638 ◽

2011 ◽

Cited By ~ 1

Author(s):

Wei-Chun Ku ◽

Tien-Fu Chen

Keyword(s):

Simulation Platform

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Dual-resonance LC-tank frequency divider implemented with switched varactor bias

Proceedings of 2011 International Symposium on VLSI Design, Automation and Test ◽

10.1109/vdat.2011.5783545 ◽

2011 ◽

Cited By ~ 8

Author(s):

Chia-Wei Chang ◽

Sheng-Lyang Jang ◽

Chong-Wei Huang ◽

Chih-Chieh Shih

Keyword(s):

Frequency Divider ◽

Dual Resonance ◽

Lc Tank

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A 915MHz integrated FSK receiver front-end and a CMOS ring oscillator PLL built with standard cells

Proceedings of 2011 International Symposium on VLSI Design, Automation and Test ◽

10.1109/vdat.2011.5783601 ◽

2011 ◽

Author(s):

Richard Su ◽

Steven Lanzisera ◽

Kristofer S. J. Pister

Keyword(s):

Ring Oscillator ◽

Standard Cells ◽

Front End

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15MHz wide tuning-range OTA with −69dBHD3 and its application to Gm-C filter

Proceedings of 2011 International Symposium on VLSI Design, Automation and Test ◽

10.1109/vdat.2011.5783589 ◽

2011 ◽

Author(s):

Jun-Ye Lin ◽

Wei-Hsiu Chang ◽

Chung-Chih Hung

Keyword(s):

Tuning Range ◽

Wide Tuning Range

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An H.264 full HD 60i double speed encoder IP supporting both MBAFF and Field-Pic structure

Proceedings of 2011 International Symposium on VLSI Design, Automation and Test ◽

10.1109/vdat.2011.5783632 ◽

2011 ◽

Cited By ~ 2

Author(s):

Hajime Matsui ◽

Takaya Ogawa ◽

Atsushi Mochizuki ◽

Hiromitsu Nakayama ◽

Sho Kodama ◽

...

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Monitoring gate and interconnect delay variations by using ring oscillators

Proceedings of 2011 International Symposium on VLSI Design, Automation and Test ◽

10.1109/vdat.2011.5783597 ◽

2011 ◽

Cited By ~ 1

Author(s):

Ying-Yen Chen ◽

Chen-Tung Lin ◽

Jin-Nung Lee ◽

Chi-Feng Wu

Keyword(s):

Ring Oscillators ◽

Interconnect Delay ◽

Delay Variations

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Exact and fast L1 cache configuration simulation for embedded systems with FIFO/PLRU cache replacement policies

Proceedings of 2011 International Symposium on VLSI Design, Automation and Test ◽

10.1109/vdat.2011.5783622 ◽

2011 ◽

Cited By ~ 3

Author(s):

Masashi Tawada ◽

Masao Yanagisawa ◽

Tatsuo Ohtsuki ◽

Nozomu Togawa

Keyword(s):

Embedded Systems ◽

Cache Replacement ◽

Configuration Simulation ◽

Cache Configuration ◽

Cache Replacement Policies

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Proceedings of 2011 International Symposium on VLSI Design, Automation and TestLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Asymmetrical ground gating for low leakage and data robust sleep mode in memory banks

Connected vehicles in a connected world

Design and verification of an integrated current mode switching regulator

Accelerating manycore simulation by efficient NoC interconnection partition on FPGA simulation platform

Dual-resonance LC-tank frequency divider implemented with switched varactor bias

A 915MHz integrated FSK receiver front-end and a CMOS ring oscillator PLL built with standard cells

15MHz wide tuning-range OTA with −69dBHD3 and its application to Gm-C filter

An H.264 full HD 60i double speed encoder IP supporting both MBAFF and Field-Pic structure

Monitoring gate and interconnect delay variations by using ring oscillators

Exact and fast L1 cache configuration simulation for embedded systems with FIFO/PLRU cache replacement policies

Proceedings of 2011 International Symposium on VLSI Design, Automation and Test
Latest Publications