Exact design for the settling time of two-stage Miller compensated operational amplifiers

Analog Integrated Circuits and Signal Processing ◽

10.1007/s10470-021-01955-3 ◽

2021 ◽

Author(s):

Gaochong Lv ◽

Yushun Guo

Keyword(s):

Settling Time ◽

Operational Amplifiers ◽

Two Stage ◽

Exact Design

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Design of high-speed two-stage cascode-compensated operational amplifiers based on settling time and open-loop parameters

Integration ◽

10.1016/j.vlsi.2007.05.003 ◽

2008 ◽

Vol 41 (2) ◽

pp. 183-192 ◽

Cited By ~ 14

Author(s):

Hamed Aminzadeh ◽

Mohammad Danaie ◽

Reza Lotfi

Keyword(s):

High Speed ◽

Open Loop ◽

Settling Time ◽

Operational Amplifiers ◽

Two Stage

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Systematic design of two-stage operational amplifiers based on settling time and open-loop constraints

Proceedings of the 17th great lakes symposium on Great lakes symposium on VLSI - GLSVLSI '07 ◽

10.1145/1228784.1228902 ◽

2007 ◽

Author(s):

Hamed Aminzadeh ◽

Mohammad Danaie

Keyword(s):

Open Loop ◽

Settling Time ◽

Operational Amplifiers ◽

Systematic Design ◽

Two Stage ◽

Loop Constraints

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Compensation of two-stage operational amplifiers for switched-capacitor applications

ICECS'99. Proceedings of ICECS '99. 6th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.99EX357) ◽

10.1109/icecs.1999.814463 ◽

2003 ◽

Cited By ~ 2

Author(s):

C. Schwoerer ◽

D. Morche ◽

P. Senn

Keyword(s):

Operational Amplifiers ◽

Switched Capacitor ◽

Two Stage

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Modified modeling of Miller compensation for two-stage operational amplifiers

1991., IEEE International Sympoisum on Circuits and Systems ◽

10.1109/iscas.1991.176049 ◽

2002 ◽

Cited By ~ 4

Author(s):

H.C. Yang ◽

D.J. Allstot

Keyword(s):

Operational Amplifiers ◽

Two Stage ◽

Miller Compensation

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Three-stage nested-Miller-compensated operational amplifiers: Analysis, design, and optimization based on settling time

International Journal of Circuit Theory and Applications ◽

10.1002/cta.663 ◽

2010 ◽

Vol 39 (6) ◽

pp. 573-587 ◽

Cited By ~ 14

Author(s):

Hamed Aminzadeh

Keyword(s):

Settling Time ◽

Operational Amplifiers ◽

Design And Optimization ◽

Analysis Design

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gm/ID-Based Frequency Compensation of CMOS Two-Stage Operational Amplifiers

2020 IEEE International Symposium on Circuits and Systems (ISCAS) ◽

10.1109/iscas45731.2020.9180575 ◽

2020 ◽

Author(s):

Chaiyanut Aueamnuay ◽

Ajmal Vadakkan Kayyil ◽

Narayana Bhagirath Thota ◽

Praveen Kumar Venkatachala ◽

David J. Allstot

Keyword(s):

Operational Amplifiers ◽

Frequency Compensation ◽

Two Stage

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Using moderate inversion to optimize voltage gain, thermal noise, and settling time in two-stage CMOS amplifiers

2012 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2012.6272056 ◽

2012 ◽

Cited By ~ 10

Author(s):

Yi Yang ◽

David M. Binkley ◽

Changzhi Li

Keyword(s):

Thermal Noise ◽

Settling Time ◽

Voltage Gain ◽

Two Stage ◽

Moderate Inversion

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Effects of resistive loading on unity gain frequency of two-stage CMOS operational amplifiers

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03. ◽

10.1109/iscas.2003.1205575 ◽

2003 ◽

Cited By ~ 1

Author(s):

U. Dasgupta ◽

Yong Ping Xu

Keyword(s):

Operational Amplifiers ◽

Two Stage ◽

Resistive Loading ◽

Unity Gain ◽

Cmos Operational Amplifiers

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Settling time of operational amplifiers with FET input transistors operating in strong inversion

International Journal of Electronics ◽

10.1080/00207218408938894 ◽

1984 ◽

Vol 57 (1) ◽

pp. 161-164

Author(s):

MUHAMMAD TAHER ABUELMA'ATTI

Keyword(s):

Settling Time ◽

Operational Amplifiers ◽

Strong Inversion

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Hybrid Cascode Compensation for Two-Stage CMOS Operational Amplifiers

2005 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2005.1464900 ◽

2005 ◽

Cited By ~ 12

Author(s):

M. Yavari ◽

O. Shoaei ◽

F. Svelto

Keyword(s):

Operational Amplifiers ◽

Two Stage ◽

Cmos Operational Amplifiers

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