Reducing the Measurement Error of Signal Propagation Delays Using an Optical Reflectometer with Picosecond Resolution

2020 ◽  
Vol 63 (1) ◽  
pp. 29-33
Author(s):  
O. V. Kolmogorov ◽  
A. N. Shchipunov ◽  
O. V. Denisenko ◽  
S. S. Donchenko ◽  
D. V. Prokhorov ◽  
...  
2020 ◽  
pp. 30-34
Author(s):  
O.V. Kolmogorov ◽  
A.N. Shchipunov ◽  
O.V. Denisenko ◽  
S.S. Donchenko ◽  
D.V. Prokhorov ◽  
...  

The problems requiring high-precision measurements of signal propagation delays in optical fibers are considered. Design features of a pulsed optical reflectometer with a picosecond resolution designed for measuring propagation delays of a signal are considered. It is shown that the error of such a reflectometer includes the additive and multiplicative components. A method for determining the additive component of the optical reflectometer error based on measurements of signal delays introduced by individual optical fiber coils and the total delay introduced by series-connected coils is proposed. The requirements to the measurement conditions are formulated and the results of the error estimation of the proposed method are presented. To exclude the multiplicative component of the reflectometer error, a method for determining corrections to the reflectometer readings is proposed. The method is based on measuring the propagation delays of the signal in the coils of the optical fiber, first using reference equipment (installation for measuring the propagation delay of the signal), and then using an optical reflectometer, and then calculating the differences of the obtained measurement results. The scheme of installation for measurements of a propagation delay of signal in a coil of optical fiber is presented, the principle of operation of measuring installation is described. The results of the estimation of the error in determining the corrections to the reflectometer readings by the proposed method are presented. It is shown that the exclusion of the additive and multiplicative components of the error will reduce the error of optical reflectometers to values less than ± 100 ps.


2012 ◽  
Vol 21 (05) ◽  
pp. 1250041
Author(s):  
THEODORE W. MANIKAS

An important part of the integrated circuit design process is the channel routing stage, which determines how to interconnect components that are arranged in sets of rows. The channel routing problem has been shown to be NP-complete, thus this problem is often solved using genetic algorithms. The traditional objective for most channel routers is to minimize total area required to complete routing. However, another important objective is to minimize signal propagation delays in the circuit. This paper describes the development of a genetic channel routing algorithm that uses a Pareto-optimal approach to accommodate both objectives. When compared to the traditional channel routing approach, the new channel router produced layouts with decreased signal delay, while still minimizing routing area.


2022 ◽  
Vol 15 (1) ◽  
pp. 1-27
Author(s):  
Franz-Josef Streit ◽  
Paul Krüger ◽  
Andreas Becher ◽  
Stefan Wildermann ◽  
Jürgen Teich

FPGA-based Physical Unclonable Functions (PUF) have emerged as a viable alternative to permanent key storage by turning effects of inaccuracies during the manufacturing process of a chip into a unique, FPGA-intrinsic secret. However, many fixed PUF designs may suffer from unsatisfactory statistical properties in terms of uniqueness, uniformity, and robustness. Moreover, a PUF signature may alter over time due to aging or changing operating conditions, rendering a PUF insecure in the worst case. As a remedy, we propose CHOICE , a novel class of FPGA-based PUF designs with tunable uniqueness and reliability characteristics. By the use of addressable shift registers available on an FPGA, we show that a wide configuration space for adjusting a device-specific PUF response is obtained without any sacrifice of randomness. In particular, we demonstrate the concept of address-tunable propagation delays, whereby we are able to increase or decrease the probability of obtaining “ 1 ”s in the PUF response. Experimental evaluations on a group of six 28 nm Xilinx Artix-7 FPGAs show that CHOICE PUFs provide a large range of configurations to allow a fine-tuning to an average uniqueness between 49% and 51%, while simultaneously achieving bit error rates below 1.5%, thus outperforming state-of-the-art PUF designs. Moreover, with only a single FPGA slice per PUF bit, CHOICE is one of the smallest PUF designs currently available for FPGAs. It is well-known that signal propagation delays are affected by temperature, as the operating temperature impacts the internal currents of transistors that ultimately make up the circuit. We therefore comprehensively investigate how temperature variations affect the PUF response and demonstrate how the tunability of CHOICE enables us to determine configurations that show a high robustness to such variations. As a case study, we present a cryptographic key generation scheme based on CHOICE PUF responses as device-intrinsic secret and investigate the design objectives resource costs, performance, and temperature robustness to show the practicability of our approach.


2004 ◽  
Vol 35 (1) ◽  
pp. 280 ◽  
Author(s):  
Soo Hwan Kim ◽  
Gyoung Bum Kim ◽  
Suk Ki Kim ◽  
Richard I. McCartney

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