Sub-half micrometer gate lift-off by three layer resist process via electron beam lithography for gallium arsenide monolithic microwave integrated circuits (MIMICs)

1989 ◽  
Vol 20 (4) ◽  
pp. 45
1987 ◽  
Vol 65 (8) ◽  
pp. 885-891
Author(s):  
S. Dindo ◽  
R. North ◽  
D. Madge

Over the last several years, Optotek has successfully developed the capability to design and process high-frequency x-band monolithic microwave integrated circuits. A process for fabricating active devices and passive elements is described. In addition, dc and microwave measurements are presented.


2005 ◽  
Vol 19 (09n10) ◽  
pp. 405-424 ◽  
Author(s):  
MICHIO WATANABE

Researches on the fabrication of ~ 0.1 × 0.1 μ m 2 superconductor–insulator–superconductor (SIS) Josephson junctions are reviewed. Today, a typical dimension is 1–10 μm for Josephson junctions in superconducting integrated circuits. These Josephson junctions are defined by well-established photolithographic technology with reactive ion etching (RIE), and for the superconductor, Nb is almost always used. The merits of Nb include the facts that the superconducting transition temperature Tc of Nb (9.2 K ) is higher than the boiling point of He (4.2 K ), and that Nb has excellent stability against thermal cycling between room temperature and liquid- He temperature. For the fabrication of ~ 0.1 × 0.1 μ m 2 junctions, on the other hand, there is a standard process with electron-beam lithography, shadow evaporation, and lift-off. This process works well for Al (Tc = 1.2 K ), however, it is not ideal for Nb . The scope of this brief review is the nanoscale junction with Nb electrodes. We will look at the efforts of optimizing the standard lift-off process for Nb , electron-beam-lithographic versions of the Nb Josephson-junction technology, focused-ion-beam (FIB) etching as a convenient alternative to electron-beam lithography and RIE, etc. In order to characterize nanoscale tunnel junctions, the single-charge transistor has been often fabricated. Therefore, a summary of its theoretical transport properties is also included.


1985 ◽  
Vol 63 (6) ◽  
pp. 736-739
Author(s):  
M. Gaudreault ◽  
M. G. Stubbs

Gallium-arsenide monolithic microwave integrated circuits (GaAs MMIC's) promise the microwave circuit designer significant size, weight, and reliability advantages. Distributed and lumped matching techniques have been utilized previously in MMIC design with the latter offering greater bandwidth and smaller size. In this paper, experimental results for lumped interdigitated capacitors on a gallium-arsenide substrate are presented. Computer modelling in the frequency range 2–18 GHz was used to derive a set of design curves for these capacitors. These curves cover aspect ratios of w/s = 1 and w/s = 2.5. Experimental results obtained by using these curves to design lumped-element monolithic filters show excellent agreement with theory.


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