A delay-partitioning approach to the stability analysis of discrete-time systems

Automatica ◽  
2010 ◽  
Vol 46 (3) ◽  
pp. 610-614 ◽  
Author(s):  
Xiangyu Meng ◽  
James Lam ◽  
Baozhu Du ◽  
Huijun Gao
Keyword(s):  
Stability Analysis ◽  
Discrete Time ◽  
Discrete Time Systems ◽  
The Stability ◽  
Time Systems ◽  
Delay Partitioning

Switching Control Design for Switched Fuzzy Discrete-Time Systems

2014 ◽  
Vol 1006-1007 ◽  
pp. 711-714
Author(s):  
Hong Yang ◽  
Huan Huan Lü ◽  
Le Zhang
Keyword(s):  
Stability Analysis ◽  
Discrete Time ◽  
Fuzzy Systems ◽  
Closed Loop ◽  
Control Method ◽  
Control Design ◽  
Switching Control ◽  
Discrete Time Systems ◽  
The Stability ◽  
Time Systems

This paper investigates the problems of stability analysis and stabilization for a class of switched fuzzy discrete-time systems. Based on a common Lyapunov functional, a switching control method has been developed for the stability analysis of switched discrete-time fuzzy systems. A new stabilization approach based on a switching parallel distributed compensation scheme is given for the closed-loop switched fuzzy systems. Finally, the illustrative example is provided to demonstrate the effectiveness of the techniques proposed in this paper.

scholarly journals Entwurf von zeitkontinuierlichen ΣΔ-Modulatoren – Äquivalenz zwischen zeitkontinuierlichen und zeitdiskreten Systemen

2007 ◽  
Vol 5 ◽  
pp. 221-224
Author(s):  
J. Anders ◽  
W. Mathis ◽  
M. Ortmanns
Keyword(s):  
Stability Analysis ◽  
Discrete Time ◽  
Input Signal ◽  
Continuous Time ◽  
Wird Eine ◽  
Loop Delay ◽  
Discrete Time Systems ◽  
Excess Loop Delay ◽  
The Stability ◽  
Time Systems

Abstract. Im vorliegenden Artikel wird eine vollstängige, d.h. unter Einbeziehung des Eingangssignals, Äquivalenz zwischen zeitkontinuierlichen und zeitdiskreten ΣΔ-Modulatoren im Zustandsraum hergeleitet. Es wird ebenfalls gezeigt, wie eine wichtige Nichtidealität, das sog. "excess loop delay", in den Berechnungen berücksichtigt werden kann. Die dargestellte Methode dient dazu, den Entwurf und dabei vor allem die Stabilitätsuntersuchungen, von zeitkontinuierlichen ΣΔs auf die bereits empirisch intensiv erforschten zeitdiskreten Systeme zurückzuführen. In the article at hand a complete equivalency, i.e. including the input signal, between continuous-time and discrete-time ΣΔ-modulators in state-space is derived. In addition, it is shown, how one can incorporate the important non-ideality of "excess loop delay" into the formalism. The method introduced is supposed to facilitate the design, especially the stability analysis part of the design, of continuous-time ΣΔs by making use of the empirically thoroughly examined discrete-time systems.

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