Novel clock synchronization algorithm of parametric difference for parallel and distributed simulations

2013 ◽  
Vol 57 (6) ◽  
pp. 1474-1487 ◽  
Author(s):  
Linjun Fan ◽  
Yunxiang Ling ◽  
Tao Wang ◽  
Xiaomin Zhu ◽  
Xiaoyong Tang
2021 ◽  
Vol 1815 (1) ◽  
pp. 012023
Author(s):  
Min Zhang ◽  
Linlin Duan ◽  
Kexian Gong ◽  
Xiaoyan Liu ◽  
Qian Cheng

2020 ◽  
Vol 2020 ◽  
pp. 1-15
Author(s):  
Hongwei Yang ◽  
Long Wang ◽  
Jing Zhang ◽  
Li Li

As a result of the influence of clock drift and uncertainty delay in synchronous message transmission, the clock synchronization model based on statistical distribution cannot accurately describe clock deviation. This model also requires a large number of timestamp samples that cause a storage occupation issue for wireless sensor nodes with limited resources. The modeling method based on grey prediction has advantages of low sample demand and simple modeling process. However, the accuracy of the existing clock synchronization models needs to be improved. Based on the grey prediction theory, this paper proposes an adaptive fractional-order operator clock synchronization algorithm considering uncertainty delay. First, based on the clock model and clock offset model, the frequency offset between nodes is optimized by taking the mean on the clock frequencies. Second, a grey prediction algorithm based on a fractional-order operator is proposed by estimating the uncertainty delay in message transmission to obtain the clock offset. Finally, the order of the fractional-order accumulation is adjusted adaptively in the grey prediction model according to the collected timestamp sample values so that the estimation of the uncertainty delay is more accurate, thereby improving the accuracy of the clock offset. Compared with the first-order accumulative grey prediction clock synchronization algorithms and timing-sync protocol for sensor networks, the proposed scheme improved the synchronization accuracy by 29.18% and 44.01%, respectively, and reduced the variance of the clock offset by 48.66% and 64.89%. Thus, the proposed algorithm is characterized by improved stability.


Author(s):  
Fabiano C. Carvalho ◽  
Carlos E. Pereira

This paper provides a runtime stability analysis of the Daisy-Chain clock synchronization algorithm running over CASCA - a time-triggered extension of CAN bus. The main objective is to show with practical results how to achieve global time base of high precision and how this precision is affected by the modification of the TDMA transmission schedule. That contributes by providing some basic guidelines for the task of designing time-triggered, TDMA-based distributed systems for embedded control applications.


2013 ◽  
Vol 11 (6) ◽  
pp. 2648-2652
Author(s):  
M. Praveen Kumar Reddy ◽  
K. Ashwin Kumar ◽  
S. Rajesh Kumar ◽  
RA.K. Saravanaguru

Synchronization of the clocks is one of the essential thing for many applications in distributed systems. Clock synchronization is very important because they improve the performance and reliability of distributed systems. The main purpose of clock synchronization algorithms is to provide the common time to essential parts of the distributed systems. In this paper the problem considered is synchronization of clock with bounded clock drift and proposing a two level synchronization algorithm which synchronizes the processors local clocks by combining both internal and external clock synchronization.


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