Video image scaling technology based on adaptive interpolation algorithm and TTS FPGA implementation

2021 ◽  
Vol 76 ◽  
pp. 103516
Author(s):  
Guangyu Liu ◽  
Bao Zhou ◽  
Yi Huang ◽  
Longfei Wang ◽  
Wei Wang ◽  
...  
Keyword(s):  
Fpga Implementation ◽  
Video Image ◽  
Interpolation Algorithm ◽  
Image Scaling ◽  
Adaptive Interpolation

FPGA Implementation of the Bilinear Interpolation Algorithm for Image Demosaicking

2009 ◽  
Author(s):  
Ivan Olaf Hernandez Fuentes ◽  
Miguel Enrique Bravo-Zanoguera ◽  
Guillermo Galaviz Yanez
Keyword(s):  
Fpga Implementation ◽  
Interpolation Algorithm ◽  
Bilinear Interpolation

FPGA Implementation of Hardware Accelerator for Real-time Video Image Edge Detection

2021 ◽  
Author(s):  
Xiangxiang Wei ◽  
Gao-Ming Du ◽  
Xiaolei Wang ◽  
Hongfang Cao ◽  
Shijie Hu ◽  
...  
Keyword(s):  
Edge Detection ◽  
Real Time ◽  
Fpga Implementation ◽  
Video Image ◽  
Hardware Accelerator ◽  
Image Edge Detection ◽  
Image Edge

Bilinear Interpolation Image Scaling Processor for VLSI Architecure

2014 ◽  
Vol 3 (3) ◽  
pp. 104 ◽  
Author(s):  
Pawar Ashwini Dilip ◽  
K Rameshbabu ◽  
Kanase Prajakta Ashok ◽  
Shital Arjun Shivdas
Keyword(s):  
Vlsi Architecture ◽  
Spatial Filter ◽  
Cmos Process ◽  
Interpolation Algorithm ◽  
Bilinear Interpolation ◽  
Hardware Cost ◽  
Image Scaling ◽  
Memory Buffer ◽  
Convolution Kernels ◽  
Calculation Unit

We introduce image scaling processor using VLSI technique. It consist of Bilinear interpolation, clamp filter and  a sharpening spatial filter. Bilinear interpolation algorithm is popular due to its computational efficiency and  image quality. But resultant image consist of blurring edges and aliasing artifacts after scaling. To reduce the blurring and aliasing artifacts sharpening spatial filter and clamp filters are used as pre-filter. These filters are realized by using T-model and inversed T-model convolution kernels. To reduce the memory buffer and computing resources for proposed image processor design two T-model or inversed T-model filters are combined into combined filter which requires only one line buffer memory. Also, to reduce hardware cost Reconfigurable calculation unit (RCU)is invented. The VLSI architecture in this work can achieve 280 MHz with 6.08-K gate counts, and its core area is 30 378 <em>μ</em>m2 synthesized by a 0.13-<em>μ</em>m CMOS process.

scholarly journals Sparse Grid Adaptive Interpolation in Problems of Modeling Dynamic Systems with Interval Parameters

Mathematics ◽  
2021 ◽  
Vol 9 (4) ◽  
pp. 298
Author(s):  
Alexander Yu Morozov ◽  
Andrey A. Zhuravlev ◽  
Dmitry L. Reviznikov
Keyword(s):  
Dynamic Systems ◽  
Materials Science ◽  
Sparse Grids ◽  
Interpolation Algorithm ◽  
Piecewise Polynomial Function ◽  
Interval Parameters ◽  
Adaptive Interpolation ◽  
Interval Uncertainties ◽  
Computational Materials ◽  
Interval Problems

The paper is concerned with the issues of modeling dynamic systems with interval parameters. In previous works, the authors proposed an adaptive interpolation algorithm for solving interval problems; the essence of the algorithm is the dynamic construction of a piecewise polynomial function that interpolates the solution of the problem with a given accuracy. The main problem of applying the algorithm is related to the curse of dimension, i.e., exponential complexity relative to the number of interval uncertainties in parameters. The main objective of this work is to apply the previously proposed adaptive interpolation algorithm to dynamic systems with a large number of interval parameters. In order to reduce the computational complexity of the algorithm, the authors propose using adaptive sparse grids. This article introduces a novelty approach of applying sparse grids to problems with interval uncertainties. The efficiency of the proposed approach has been demonstrated on representative interval problems of nonlinear dynamics and computational materials science.

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