Studies on silicon-on-insulator-multilayer structures prepared by epitaxial layer transfer

2004 ◽  
Vol 58 (3-4) ◽  
pp. 465-469
Author(s):  
Xinyun Xie ◽  
Qing Lin ◽  
Weili Liu ◽  
Chenglu Lin
2003 ◽  
Vol 336 (3-4) ◽  
pp. 344-348 ◽  
Author(s):  
Xinyun Xie ◽  
Weili Liu ◽  
Qing Lin ◽  
Chuanling Men ◽  
Chenglu Lin

2002 ◽  
Vol 245 (3-4) ◽  
pp. 207-211 ◽  
Author(s):  
Xinyun Xie ◽  
Ninglin Zhang ◽  
Chuanling Men ◽  
Weili Liu ◽  
Qing Lin ◽  
...  

2001 ◽  
Vol 18 (5) ◽  
pp. 662-664 ◽  
Author(s):  
Liu Wei-Li ◽  
Duo Xin-Zhong ◽  
Wang Lian-Wei ◽  
Zhang Miao ◽  
Shen Qin-Wo ◽  
...  

2003 ◽  
Vol 52 (1) ◽  
pp. 207
Author(s):  
Xie Xin-Yun ◽  
Lin Qing ◽  
Men Chuan-Ling ◽  
Liu Wei-Li ◽  
Xu An-Huai ◽  
...  

2010 ◽  
Vol 157 (1) ◽  
pp. H81 ◽  
Author(s):  
Xing Wei ◽  
Aimin Wu ◽  
Xiang Wang ◽  
Xianyuan Li ◽  
Fei Ye ◽  
...  

Author(s):  
Xing Wei ◽  
Bo Zhang ◽  
Meng Chen ◽  
Miao Zhang ◽  
Xi Wang ◽  
...  

2004 ◽  
Vol 809 ◽  
Author(s):  
B. Ghyselen ◽  
Y. Bogumilowicz ◽  
C. Aulnette ◽  
A. Abbadie ◽  
B. Osternaud ◽  
...  

ABSTRACTStrained Silicon On Insulator wafers are today envisioned as a natural and powerfulenhancement to standard SOI and/or bulk-like strained Si layers. For MOSFETs applications, thisnew technology potentially combines enhanced devices scalability allowed by thin films andenhanced electron and hole mobility in strained silicon. This paper is intended to demonstrate byexperimental results how a layer transfer technique such as the Smart Cut™ technology can be usedto obtain good quality tensile Strained Silicon On insulator wafers. Detailed experiments andcharacterizations will be used to characterize these engineered substrates and show that they arecompatible with the applications.


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