Boolean Circuit Depth

1996 ◽  
pp. 119-130
2021 ◽  
Vol 20 (2) ◽  
Author(s):  
Rebekah Herrman ◽  
James Ostrowski ◽  
Travis S. Humble ◽  
George Siopsis

2021 ◽  
Author(s):  
Sun Woo Park ◽  
Hyunju Lee ◽  
Byung Chun Kim ◽  
Youngho Woo ◽  
Kyungtaek Jun

1992 ◽  
Vol 42 (6) ◽  
pp. 295-298 ◽  
Author(s):  
Peter Bro Miltersen
Keyword(s):  

2009 ◽  
Vol 7 (2) ◽  
pp. 267-277
Author(s):  
Kunsoo Park ◽  
Heejin Park ◽  
Woo-Chul Jeun ◽  
Soonhoi Ha

2010 ◽  
Vol 110 (7) ◽  
pp. 264-267 ◽  
Author(s):  
E. Demenkov ◽  
A. Kojevnikov ◽  
A. Kulikov ◽  
G. Yaroslavtsev

2010 ◽  
Vol 02 (04) ◽  
pp. 483-492
Author(s):  
XUE CHEN ◽  
GUANGDA HU ◽  
XIAOMING SUN

A word circuit [1] is a directed acyclic graph in which each edge holds a w-bit word (i.e., some x ∈ {0, 1}w) and each node is a gate computing some binary function g : {0, 1}w × {0, 1}w → {0, 1}w. The following problem was studied in [1]: How many binary gates are needed to compute a ternary function f : ({0, 1}w)3 → {0, 1}w. They proved that (2 + o(1))2w binary gates are enough for any ternary function, and there exists a ternary function which requires word circuits of size (1 - o(1))2w. One of the open problems in [1] is to get these bounds tight within a low order term. In this paper we solved this problem by constructing new word circuits for ternary functions of size (1 + o(1))2w. We investigate the problem in a general setting: How many k-input word gates are needed for computing an n-input word function f : ({0, 1}w)n → {0, 1}w (here n ≥ k). We show that for any fixed n, (1 - o(1))2(n - k)w basic gates are necessary and (1 + o(1))2(n - k)w gates are sufficient (assume w is sufficiently large). Since word circuit is a natural generalization of boolean circuit, we also consider the case when w is a constant and the number of inputs n is sufficiently large. We show that [Formula: see text] basic gates are necessary and sufficient in this case.


Quantum ◽  
2021 ◽  
Vol 5 ◽  
pp. 422
Author(s):  
Lena Funcke ◽  
Tobias Hartung ◽  
Karl Jansen ◽  
Stefan Kühn ◽  
Paolo Stornati

Parametric quantum circuits play a crucial role in the performance of many variational quantum algorithms. To successfully implement such algorithms, one must design efficient quantum circuits that sufficiently approximate the solution space while maintaining a low parameter count and circuit depth. In this paper, develop a method to analyze the dimensional expressivity of parametric quantum circuits. Our technique allows for identifying superfluous parameters in the circuit layout and for obtaining a maximally expressive ansatz with a minimum number of parameters. Using a hybrid quantum-classical approach, we show how to efficiently implement the expressivity analysis using quantum hardware, and we provide a proof of principle demonstration of this procedure on IBM's quantum hardware. We also discuss the effect of symmetries and demonstrate how to incorporate or remove symmetries from the parametrized ansatz.


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