2 × VDD output buffer with 36.4% slew rate improvement using leakage current compensation

C.‐C. Wang; T.‐Y. Tsai; T.‐J. Lee; K.‐W. Ruan

doi:10.1049/el.2016.2351

2 × VDD output buffer with 36.4% slew rate improvement using leakage current compensation

Electronics Letters ◽

10.1049/el.2016.2351 ◽

2017 ◽

Vol 53 (2) ◽

pp. 62-64 ◽

Cited By ~ 3

Author(s):

C.‐C. Wang ◽

T.‐Y. Tsai ◽

T.‐J. Lee ◽

K.‐W. Ruan

Keyword(s):

Leakage Current ◽

Output Buffer ◽

Slew Rate ◽

Current Compensation ◽

Rate Improvement

A 90-nm 640 MHz 2 × VDD Output Buffer With 41.5% Slew Rate Improvement Using PVT Compensation

IEEE Transactions on Circuits & Systems II Express Briefs ◽

10.1109/tcsii.2020.3012150 ◽

2020 ◽

Vol 67 (9) ◽

pp. 1524-1528

Author(s):

Jian-An Wang ◽

Yuan-Yao Zhao ◽

Zheng-Ping Zhang

Keyword(s):

Output Buffer ◽

Slew Rate ◽

Rate Improvement

A Dynamic Leakage and Slew Rate Compensation Circuit for 40-nm CMOS Mixed-Voltage Output Buffer

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2017.2736782 ◽

2017 ◽

Vol 25 (11) ◽

pp. 3166-3174 ◽

Cited By ~ 3

Author(s):

Tzung-Je Lee ◽

Tsung-Yi Tsai ◽

Wei Lin ◽

U-Fat Chio ◽

Chua-Chin Wang

Keyword(s):

Output Buffer ◽

Slew Rate ◽

Compensation Circuit ◽

Voltage Output ◽

Slew Rate Compensation

2 × VDD 28-nm CMOS digital output buffer using low-Vth transistors for slew rate adjustment

2017 7th International Conference on Integrated Circuits, Design, and Verification (ICDV) ◽

10.1109/icdv.2017.8188630 ◽

2017 ◽

Author(s):

Chua-Chin Wangt ◽

Tsung-Yi Tsai ◽

Yu-Lin Deng ◽

Tzung-Je Lee

Keyword(s):

Output Buffer ◽

Slew Rate ◽

Digital Output ◽

Rate Adjustment ◽

28 Nm

6.6L: Late-News Paper: A Low Quiescent Current and Fast Settling Output Buffer with Boosting Slew-rate Scheme for Large LCD Driver

SID Symposium Digest of Technical Papers ◽

10.1889/1.3500579 ◽

2010 ◽

Vol 41 (1) ◽

pp. 74

Author(s):

II Kwon Chang ◽

Min Sung Kim ◽

Ji Ho Lew ◽

Joon Yul Yun ◽

Jae Kyu Park ◽

...

Keyword(s):

Output Buffer ◽

Slew Rate ◽

Lcd Driver ◽

Quiescent Current ◽

Late News ◽

Fast Settling

2$$\times $$VDD 500 MHz Digital Output Buffer with Optimal Driver Transistor Sizing for Slew Rate Self-adjustment and Leakage Reduction Using 28-nm CMOS Process

Circuits Systems and Signal Processing ◽

10.1007/s00034-020-01594-5 ◽

2020 ◽

Author(s):

Chua-Chin Wang ◽

Pang-Yen Lou ◽

Tsung-Yi Tsai ◽

Yan-You Chou ◽

Tzung-Je Lee

Keyword(s):

Cmos Process ◽

Output Buffer ◽

Slew Rate ◽

Digital Output ◽

Leakage Reduction ◽

Transistor Sizing ◽

28 Nm

Leakage Current Compensation in Large Number of Inactive Synapses in a 130nm CMOS Process

2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS) ◽

10.1109/mwscas48704.2020.9184611 ◽

2020 ◽

Author(s):

Md Munir Hasan ◽

Jeremy Holleman

Keyword(s):

Leakage Current ◽

Cmos Process ◽

Current Compensation

$2\times\text{VDD}$ 40-nm CMOS Output Buffer With Slew Rate Self-Adjustment Using Leakage Compensation

IEEE Transactions on Circuits & Systems II Express Briefs ◽

10.1109/tcsii.2016.2599538 ◽

2017 ◽

Vol 64 (7) ◽

pp. 812-816 ◽

Cited By ~ 4

Author(s):

Chua-Chin Wang ◽

Zong-You Hou ◽

Kai-Wei Ruan

Keyword(s):

Output Buffer ◽

Slew Rate

Leakage current compensation technique of ESD protection circuit for CMOS operational amplifier

2016 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS) ◽

10.1109/ispacs.2016.7824722 ◽

2016 ◽

Cited By ~ 1

Author(s):

Koken Chin ◽

Hao San ◽

Atsushi Kitajima ◽

Yoshiaki Arai ◽

Jun Yamashita ◽

...

Keyword(s):

Leakage Current ◽

Operational Amplifier ◽

Current Compensation ◽

Esd Protection ◽

Compensation Technique ◽

Protection Circuit

An output buffer with slew-rate calibration for different TFT-LCD loadings

The 2010 International Conference on Green Circuits and Systems ◽

10.1109/icgcs.2010.5543007 ◽

2010 ◽

Author(s):

Chun-Chi Yeh ◽

Jia-Hui Wang ◽

Chien-Hung Tsai

Keyword(s):

Output Buffer ◽

Slew Rate

A slew rate self-adjusting 2×VDD output buffer With PVT compensation

Proceedings of Technical Program of 2012 VLSI Design, Automation and Test ◽

10.1109/vlsi-dat.2012.6212590 ◽

2012 ◽

Cited By ~ 2

Author(s):

Chih-Lin Chen ◽

Hsin-Yuan Tseng ◽

Ron-Chi Kuo ◽

Chua-Chin Wang

Keyword(s):

Output Buffer ◽

Slew Rate