An efficient memory allocation algorithm and hardware design with VHDL synthesis

2008 ◽  
Vol 95 (2) ◽  
pp. 125-138
Author(s):  
F. Karabiber ◽  
A. Sertbas ◽  
S. Ozdemir ◽  
H. Cam
1999 ◽  
Vol 14 (4) ◽  
pp. 311-323
Author(s):  
Seung Jun Lee ◽  
Kyeong Ho Yang ◽  
Jun Seok Song ◽  
Choong Woong Lee

Author(s):  
Eric J. Friedman ◽  
Vasilis Gkatzelis ◽  
Christos-Alexandros Psomas ◽  
Scott Shenker

A cache memory unit needs to be shared among n strategic agents. Each agent has different preferences over the files to be brought into memory. The goal is to design a mechanism that elicits these preferences in a truthful manner and outputs a fair and efficient memory allocation. A trivially truthful and fair solution would isolate each agent to a 1/n fraction of the memory. However, this could be very inefficient if the agents have similar preferences and, thus, there is room for cooperation. On the other hand, if the agents are not isolated, unless the mechanism is carefully designed, they have incentives to misreport their preferences and free ride on the files that others bring into memory. In this paper we explore the power and limitations of truthful mechanisms in this setting. We demonstrate that mechanisms blocking agents from accessing parts of the memory can achieve improved efficiency guarantees, despite the inherent inefficiencies of blocking.


2017 ◽  
Vol 73 (11) ◽  
pp. 5006-5033 ◽  
Author(s):  
Anwar Al-Yatama ◽  
Imtiaz Ahmad ◽  
Naelah Al-Dabbous

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