Design and programming of a flexible, cost-effective systolic array cell for digital signal processing

1990 ◽  
Vol 38 (7) ◽  
pp. 1198-1210 ◽  
Author(s):  
R.A.W. Smith ◽  
M. Dillion ◽  
G.E. Sobelman
2013 ◽  
Vol 11 (1) ◽  
pp. 2175-2181
Author(s):  
Rajesh Mehra ◽  
Lajwanti Singh

In this paper, a decimator design has been presented for multirate digital signal processing.  The decimator design has been analysed and simulated for cost comparison in terms of multipliers and MPIS. Two structures  namely Transposed Direct form and Symmetric Direct form have been used performance and  resource consumption analysis. The decimators have been designed  & simulated using MATLAB. It can be observed from the simulated results that symmetric structure comsumes almost 50% less multipliers and MPIS compared to transposed structure. So the symmetric structure based decimator is suitable to provide cost effective solution


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