3-D memory organization and performance analysis for multi-processor network-on-chip architecture

2009 ◽  
Author(s):  
Awet Yemane Weldezion ◽  
Zhonghai Lu ◽  
Roshan Weerasekera ◽  
Hannu Tenhunen
Keyword(s):  
Performance Analysis ◽  
Network On Chip ◽  
Memory Organization ◽  
And Performance ◽  
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scholarly journals Model of Network-on-Chip routers and performance analysis

2011 ◽  
Vol 8 (13) ◽  
pp. 986-993 ◽  
Author(s):  
Youhui Zhang ◽  
Xiaoguo Dong ◽  
Siqing Gan ◽  
Weimin Zheng
Keyword(s):  
Performance Analysis ◽  
Network On Chip ◽  
And Performance ◽  
On Chip

scholarly journals Design Trade off and Performance Analysis of Router Architectures in Network-on-Chip

2015 ◽  
Vol 56 ◽  
pp. 421-426
Author(s):  
Jawwad Latif ◽  
Hassan Nazeer Chaudhry ◽  
Sadia Azam ◽  
Naveed Khan baloch
Keyword(s):  
Performance Analysis ◽  
Network On Chip ◽  
Trade Off ◽  
And Performance ◽  
On Chip
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