Modeling and Performance Analysis of Network on Chip Based on Improved Asymmetric Multi-channel Router

2012 IEEE 12th International Conference on Computer and Information Technology ◽

10.1109/cit.2012.146 ◽

2012 ◽

Author(s):

Xianglong Ren ◽

Deyuan Gao ◽

Xiaoya Fan ◽

Jianfeng An ◽

Tao Yao

Keyword(s):

Performance Analysis ◽

Network On Chip ◽

And Performance ◽

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Model of Network-on-Chip routers and performance analysis

IEICE Electronics Express ◽

10.1587/elex.8.986 ◽

2011 ◽

Vol 8 (13) ◽

pp. 986-993 ◽

Author(s):

Youhui Zhang ◽

Xiaoguo Dong ◽

Siqing Gan ◽

Weimin Zheng

Keyword(s):

Performance Analysis ◽

Network On Chip ◽

And Performance ◽

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Simulation and performance analysis of network on chip architectures using OPNET

2007 7th International Conference on ASIC ◽

10.1109/icasic.2007.4415871 ◽

2007 ◽

Author(s):

Wu Ning ◽

Ge Fen ◽

Wang Qi

Keyword(s):

Performance Analysis ◽

Network On Chip ◽

And Performance ◽

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Power and performance analysis of 3D network-on-chip architectures

Computers & Electrical Engineering ◽

10.1016/j.compeleceng.2020.106592 ◽

2020 ◽

Vol 83 ◽

pp. 106592

Author(s):

Bheemappa Halavar ◽

Basavaraj Talawar

Keyword(s):

Performance Analysis ◽

Network On Chip ◽

And Performance ◽

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Design Trade off and Performance Analysis of Router Architectures in Network-on-Chip

Procedia Computer Science ◽

10.1016/j.procs.2015.07.230 ◽

2015 ◽

Vol 56 ◽

pp. 421-426

Author(s):

Jawwad Latif ◽

Hassan Nazeer Chaudhry ◽

Sadia Azam ◽

Naveed Khan baloch

Keyword(s):

Performance Analysis ◽

Network On Chip ◽

Trade Off ◽

And Performance ◽

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DESIGN AND PERFORMANCE ANALYSIS OF ROUTER IN NETWORK-ON-CHIP USING QUEUING THEORY

International Journal on Intelligent Electronic Systems ◽

10.18000/ijies.30127 ◽

2013 ◽

Vol 7 (2) ◽

pp. 13-17

Author(s):

Immanuvel C ◽

B Jaiganesh ◽

S.A Sivasankari

Keyword(s):

Performance Analysis ◽

Queuing Theory ◽

Network On Chip ◽

And Performance ◽

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Implementation and Performance Analysis of Adaptive Routing Algorithms for Mesh and Torus Topology in Network on Chip

2019 4th International Conference on Recent Trends on Electronics, Information, Communication & Technology (RTEICT) ◽

10.1109/rteict46194.2019.9016386 ◽

2019 ◽

Author(s):

Ajey Amtange ◽

Aditya Shankar Hegde ◽

B Sahana

Keyword(s):

Performance Analysis ◽

Adaptive Routing ◽

Network On Chip ◽

Routing Algorithms ◽

And Performance ◽

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3-D memory organization and performance analysis for multi-processor network-on-chip architecture

2009 IEEE International Conference on 3D System Integration ◽

10.1109/3dic.2009.5306593 ◽

2009 ◽

Author(s):

Awet Yemane Weldezion ◽

Zhonghai Lu ◽

Roshan Weerasekera ◽

Hannu Tenhunen

Keyword(s):

Performance Analysis ◽

Network On Chip ◽

Memory Organization ◽

And Performance ◽

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An accurate and efficient performance analysis approach based on queuing model for Network on Chip

Proceedings of the 2009 International Conference on Computer-Aided Design - ICCAD '09 ◽

10.1145/1687399.1687505 ◽

2009 ◽

Author(s):

Mingche Lai ◽

Lei Gao ◽

Nong Xiao ◽

Zhiying Wang

Keyword(s):

Performance Analysis ◽

Network On Chip ◽

Analysis Approach ◽

Queuing Model ◽

Efficient Performance ◽

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Performance Analysis of Network-on-Chip Topologies for Elbrus Multi-Core Processors

2020 International Conference Engineering and Telecommunication (En&T) ◽

10.1109/ent50437.2020.9431279 ◽

2020 ◽

Author(s):

Evgenii Kozhin ◽

Alexey Kozhin ◽

Danil Shpagilev

Keyword(s):

Performance Analysis ◽

Network On Chip ◽

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A Modular and Distributed Setup for Power and Performance Analysis of Multi-Processor System-on-Chip at Electronic System Level

2020 IEEE 39th International Performance Computing and Communications Conference (IPCCC) ◽

10.1109/ipccc50635.2020.9391516 ◽

2020 ◽

Author(s):

Muhammad Mudussir Ayub ◽

Franz Kreupl

Keyword(s):

Performance Analysis ◽

Electronic System ◽

System On Chip ◽

System Level ◽

Electronic System Level ◽

And Performance ◽

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