Dual Edge Triggered Flip-Flops for Noise Blocking and Application to Signal Delay Detection

2012 ◽  
Author(s):  
Yoshihiro Ohkawa ◽  
Yukiya Miura
Keyword(s):  
Signal Delay ◽  
Delay Detection

scholarly journals Design of Signal Delay-Detection System by using Dual-Edge Trigger Flip Flops

2015 ◽  
Vol 8 (20) ◽  
Author(s):  
Madhu Lodhi ◽  
T. Vigneswaran
Keyword(s):  
Detection System ◽  
Signal Delay ◽  
Delay Detection

Frequency Measurement Method Based on Signal Delay Detection

2014 ◽  
Vol 608-609 ◽  
pp. 870-874
Author(s):  
Wen Quan Wu ◽  
Hua Yu
Keyword(s):  
Delay Time ◽  
Measurement Method ◽  
Reference Signal ◽  
Frequency Measurement ◽  
Measured Signal ◽  
Signal Delay ◽  
Closing Time ◽  
Average Delay ◽  
Delay Detection ◽  
Signal Error

A frequency measurement method based on signal delay detection is presented. The method adopts multi-path same delay line to generate multi-path delayed signal whose period is almost the same with that of the reference signal, the average delay time of two adjacent signals that are detected is selected as the interval between the reference signal's rising edge and gate's opening and closing time to calculate the frequency of the measured signal. Error analysis and measurement uncertainty evaluation show that the precision of measurement of the method is determined by the delay time. Experimental data verify that the method could ensure testing speed while effectively reduce the error of ± 1 count.

Do the Fillers Uh and Um Signal Delay in Spoken Discourse?

2004 ◽  
Author(s):  
Daniel C. O'Connell ◽  
Sabine Kowal
Keyword(s):  
Signal Delay ◽  
Spoken Discourse

Optimisation of optical signal delay in slow-light systems based on stimulated brillouin scattering

2008 ◽  
Author(s):  
R. Henker ◽  
T. Schneider ◽  
A. Wiatrek ◽  
K.-U. Lauterbach ◽  
M. Junker ◽  
...  
Keyword(s):  
Slow Light ◽  
Brillouin Scattering ◽  
Stimulated Brillouin Scattering ◽  
Optical Signal ◽  
Signal Delay ◽  
Stimulated Brillouin

SIGNAL DELAY FOR GENERALLY INTERCONNECTED DISTRIBUTED STRUCTURES

1992 ◽  
Vol 11 (4) ◽  
pp. 537-544
Author(s):  
CORNELIU A. MARINOV ◽  
JUKKA‐PEKKA SANTANEN
Keyword(s):  
Signal Delay ◽  
Distributed Structures

scholarly journals Severe violations of independence in response inhibition tasks

2021 ◽  
Vol 7 (12) ◽  
pp. eabf4355
Author(s):  
Patrick G. Bissett ◽  
Henry M. Jones ◽  
Russell A. Poldrack ◽  
Gordon D. Logan
Keyword(s):  
Response Inhibition ◽  
Theoretical Foundation ◽  
Reaction Times ◽  
Stop Signal ◽  
Experimental Paradigm ◽  
Signal Delay ◽  
Independence Assumption ◽  
Analysis Techniques ◽  
Wide Range ◽  
Saccadic Responses

The stop-signal paradigm, a primary experimental paradigm for understanding cognitive control and response inhibition, rests upon the theoretical foundation of race models, which assume that a go process races independently against a stop process that occurs after a stop-signal delay (SSD). We show that severe violations of this independence assumption at short SSDs occur systematically across a wide range of conditions, including fast and slow reaction times, auditory and visual stop signals, manual and saccadic responses, and especially in selective stopping. We also reanalyze existing data and show that conclusions can change when short SSDs are excluded. Last, we suggest experimental and analysis techniques to address this violation, and propose adjustments to extant models to accommodate this finding.

Development of distortion product emissions in the gerbil: “Filter” response and signal delay

1997 ◽  
Vol 101 (1) ◽  
pp. 395-411 ◽  
Author(s):  
David M. Mills ◽  
Edwin W Rubel
Keyword(s):  
Signal Delay ◽  
Distortion Product ◽  
Filter Response

TDC Implementation Based on Internal Delay Module of FPGA

2013 ◽  
Vol 816-817 ◽  
pp. 1063-1068
Author(s):  
Rou Gang Zhou ◽  
Yun Fei Zhou ◽  
Guang Dou Liu ◽  
Xiao Tu
Keyword(s):  
Nuclear Physics ◽  
Measurement Accuracy ◽  
Laser Interferometer ◽  
Interpolation Method ◽  
Time Measurement ◽  
Clock Signal ◽  
Signal Delay ◽  
Digital Conversion ◽  
Sampling Points ◽  
Stable Performance

Currently the time to digital converter (TDC) integrated in FPGA performs time-to-digital conversion in the carry chain mode and inter-slot offset is caused to be severe by internal wiring in the FPGA. Based on the carry chain interpolation method, this paper proposes the method for using a delay module in FPGA to achieve accurate signal delay. By calculating the phase difference of multi-clock signal between two latch sampling points, the interval between two sampling points was obtained. Experimental results indicate a measurement accuracy of 78ps or 52ps can be reached by precisely collecting time through the delay module in FPGA. Compared to the carry chain interpolation method, this method is significantly advantageous in small inter-slot offset, stable performance and convenient design and can meet the requirement for time measurement or requirement by laser interferometer with a nm-level accuracy in nuclear physics.

Generalized filter-bank equalizer for noise reduction with reduced signal delay

2005 ◽  
Author(s):  
Heinrich W. Lollmann ◽  
Peter Vary
Keyword(s):  
Noise Reduction ◽  
Filter Bank ◽  
Signal Delay
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