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Ultra-low Power and Area-efficient Hardware Accelerator for Adaptive Neural Signal Compression
Mapping Intimacies
◽
10.1109/biocas49922.2021.9644999
◽
2021
◽
Author(s):
Qier Ma
◽
Liyuan Guo
◽
Seyed Mohammad Ali Zeinolabedin
◽
Christian Mayr
Keyword(s):
Low Power
◽
Hardware Accelerator
◽
Signal Compression
◽
Neural Signal
◽
Ultra Low Power
◽
Area Efficient
Download Full-text
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References
An ultra low-power hardware accelerator for automatic speech recognition
2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)
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10.1109/micro.2016.7783750
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2016
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Cited By ~ 16
Author(s):
Reza Yazdani
◽
Albert Segura
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Jose-Maria Arnau
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Antonio Gonzalez
Keyword(s):
Speech Recognition
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Automatic Speech Recognition
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An ultra-low power and area efficient 10 bit digital to analog converter architecture
2014 IEEE International Conference on Semiconductor Electronics (ICSE2014)
◽
10.1109/smelec.2014.6920858
◽
2014
◽
Cited By ~ 7
Author(s):
Iffa Binti Sharuddin
◽
L. Lee
Keyword(s):
Low Power
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◽
Ultra Low Power
◽
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◽
Digital To Analog
◽
Area Efficient
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An area-efficient, 0.022-mm2, fully integrated resistor-less relaxation oscillator for ultra-low power real-time clock applications
2017 IEEE International Symposium on Circuits and Systems (ISCAS)
◽
10.1109/iscas.2017.8050350
◽
2017
◽
Cited By ~ 2
Author(s):
H. Asano
◽
T. Hirose
◽
T. Ozaki
◽
N. Kuroki
◽
M. Numa
Keyword(s):
Low Power
◽
Real Time
◽
Relaxation Oscillator
◽
Ultra Low Power
◽
Fully Integrated
◽
Real Time Clock
◽
Area Efficient
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A MICRO ULTRA LOW POWER RF RADIO FOR NEURAL SIGNAL RECORDING
Proceedings of the First International Conference on Biomedical Electronics and Devices
◽
10.5220/0001055702360239
◽
2008
◽
Keyword(s):
Low Power
◽
Neural Signal
◽
Ultra Low Power
◽
Signal Recording
◽
Neural Signal Recording
Download Full-text
Area-efficient and ultra-low-power architecture of RSA processor for RFID
Electronics Letters
◽
10.1049/el.2012.1767
◽
2012
◽
Vol 48
(19)
◽
pp. 1185
◽
Cited By ~ 7
Author(s):
D.M. Wang
◽
Y.Y. Ding
◽
J. Zhang
◽
J.G. Hu
◽
H.Z. Tan
Keyword(s):
Low Power
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Ultra Low Power
◽
Power Architecture
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Area Efficient
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Intelligent Content-Aware Model-Free Low Power Evoked Neural Signal Compression
Advances in Multimedia Information Processing - PCM 2008 - Lecture Notes in Computer Science
◽
10.1007/978-3-540-89796-5_109
◽
2008
◽
pp. 898-901
◽
Cited By ~ 3
Author(s):
Chen Han Chung
◽
Yu-Chieh Kao
◽
Liang-Gee Chen
◽
Fu-Shan Jaw
Keyword(s):
Low Power
◽
Signal Compression
◽
Neural Signal
◽
Model Free
◽
Content Aware
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An Ultra-Low Power Area Efficient Voltage Controlled Oscillator Based on Tunable Active Inductor for Wireless Applications
Microprocessors and Microsystems
◽
10.1016/j.micpro.2021.104291
◽
2021
◽
pp. 104291
Author(s):
Omar Faruqe
◽
Md. Tawfiq Amin
Keyword(s):
Low Power
◽
Active Inductor
◽
Voltage Controlled Oscillator
◽
Ultra Low Power
◽
Wireless Applications
◽
Area Efficient
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An Ultra Low-Power Hardware Accelerator for Acoustic Scoring in Speech Recognition
2017 26th International Conference on Parallel Architectures and Compilation Techniques (PACT)
◽
10.1109/pact.2017.11
◽
2017
◽
Cited By ~ 4
Author(s):
Hamid Tabani
◽
Jose-Maria Arnau
◽
Jordi Tubella
◽
Antonio Gonzalez
Keyword(s):
Speech Recognition
◽
Low Power
◽
Hardware Accelerator
◽
Ultra Low Power
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An Ultra-Low Power Turning Angle Based Biomedical Signal Compression Engine with Adaptive Threshold Tuning
Sensors
◽
10.3390/s17081809
◽
2017
◽
Vol 17
(8)
◽
pp. 1809
◽
Cited By ~ 1
Author(s):
Jun Zhou
◽
Chao Wang
Keyword(s):
Low Power
◽
Adaptive Threshold
◽
Signal Compression
◽
Biomedical Signal
◽
Ultra Low Power
◽
Turning Angle
◽
Threshold Tuning
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An Area-Efficient Resistor-less On-Chip Frequency Reference for Ultra-Low Power Real-Time Clock Application
IEEJ Transactions on Electrical and Electronic Engineering
◽
10.1002/tee.22780
◽
2018
◽
Vol 13
(11)
◽
pp. 1633-1641
Author(s):
Hiroki Asano
◽
Tetsuya Hirose
◽
Toshihiro Ozaki
◽
Nobutaka Kuroki
◽
Masahiro Numa
Keyword(s):
Low Power
◽
Real Time
◽
Ultra Low Power
◽
Frequency Reference
◽
Real Time Clock
◽
On Chip
◽
Area Efficient
Download Full-text
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