A pipelined digital differential matched filter FPGA implementation and VLSI design

Proceedings of Custom Integrated Circuits Conference ◽

10.1109/cicc.1996.510515 ◽

2002 ◽

Author(s):

Kuang-Chan Liu ◽

Wun-Chang Lin ◽

Chorng-Kuang Wang

Keyword(s):

Matched Filter ◽

Vlsi Design ◽

Fpga Implementation

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High-speed parallel matched filter designing and FPGA implementation

Wuhan University Journal of Natural Sciences ◽

10.1007/s11859-010-0662-2 ◽

2010 ◽

Vol 15 (4) ◽

pp. 335-339

Author(s):

Qinglin Zhang ◽

Shuzhen Chen ◽

Yijun Luo ◽

Shan Wang

Keyword(s):

Matched Filter ◽

Fpga Implementation

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VLSI Design and FPGA Implementation of N Binary Multiplier Using N-1 Binary Multipliers

International Journal of Science and Research (IJSR) ◽

10.21275/v5i3.nov161976 ◽

2016 ◽

Vol 5 (3) ◽

pp. 983-987

Keyword(s):

Vlsi Design ◽

Fpga Implementation ◽

Binary Multiplier

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An FPGA implementation of a matched filter detector for spread spectrum communications systems

Field-Programmable Logic and Applications - Lecture Notes in Computer Science ◽

10.1007/3-540-63465-7_241 ◽

1997 ◽

pp. 364-373 ◽

Author(s):

T. Mathews ◽

S. G. Gibb ◽

L. E. Turner ◽

P. J. W. Graumann ◽

M. Fattouche

Keyword(s):

Spread Spectrum ◽

Matched Filter ◽

Fpga Implementation ◽

Communications Systems ◽

Spread Spectrum Communications

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VLSI-design and FPGA-implementation of GMSK-demodulator architecture using CORDIC engine for low-power application

2016 IEEE Annual India Conference (INDICON) ◽

10.1109/indicon.2016.7838954 ◽

2016 ◽

Author(s):

Lalit Kumar ◽

Deepak Kumar Mittal ◽

Rahul Shrestha

Keyword(s):

Low Power ◽

Vlsi Design ◽

Fpga Implementation ◽

Power Application

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A novel VLSI design of DCTQ processor for FPGA implementation

2015 19th International Symposium on VLSI Design and Test ◽

10.1109/isvdat.2015.7208102 ◽

2015 ◽

Author(s):

Yogesh M. Jain ◽

Aviraj R. Jadhav ◽

Harish V. Dixit ◽

Akshay S. Hindole ◽

Jithin R. Vadakoott ◽

...

Keyword(s):

Vlsi Design ◽

Fpga Implementation

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VLSI DESIGN OF HIGH PERFORMANCE DA-BASED RECONFIGURABLE FIR DIGITAL FILTER FOR ASIC AND FPGA IMPLEMENTATION

i-manager s Journal on Circuits and Systems ◽

10.26634/jcir.6.1.14494 ◽

2018 ◽

Vol 6 (1) ◽

pp. 8

Author(s):

P. LOKESH ◽

S. CHANDANA ◽

U. SOMALATHA ◽

◽

◽

...

Keyword(s):

Digital Filter ◽

High Performance ◽

Vlsi Design ◽

Fpga Implementation ◽

Fir Digital Filter

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VLSI design of high speed Vedic Multiplier for FPGA implementation

2016 IEEE International Conference on Engineering and Technology (ICETECH) ◽

10.1109/icetech.2016.7569385 ◽

2016 ◽

Author(s):

Kapil Ram Gavali ◽

Poonam Kadam

Keyword(s):

Vlsi Design ◽

Fpga Implementation ◽

Vedic Multiplier

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Data Security for EPC Gen-2: VLSI Design and Its FPGA Implementation

2013 Third International Conference on Advanced Computing and Communication Technologies (ACCT) ◽

10.1109/acct.2013.77 ◽

2013 ◽

Author(s):

J. Bag ◽

K. M. Rajanna ◽

S. K. Sarkar

Keyword(s):

Data Security ◽

Vlsi Design ◽

Fpga Implementation

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Advanced Model Order Reduction Techniques in VLSI Design

10.1017/cbo9780511541117 ◽

2007 ◽

Author(s):

Sheldon Tan ◽

Lei He

Keyword(s):

Model Order Reduction ◽

Vlsi Design ◽

Order Reduction ◽

Model Order ◽

Reduction Techniques ◽

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Theoretical Foundations of VLSI Design

10.1017/cbo9780511569838 ◽

1990 ◽

Keyword(s):

Vlsi Design ◽

Theoretical Foundations

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