2015 19th International Symposium on VLSI Design and Test
Latest Publications

TOTAL DOCUMENTS

120

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H-INDEX

(FIVE YEARS 0)

Published By IEEE

9781479917433

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Improved supply regulation and temperature compensated current reference circuit with low process variations

2015 19th International Symposium on VLSI Design and Test ◽

10.1109/isvdat.2015.7208049 ◽

2015 ◽

Cited By ~ 1

Author(s):

Suraj Gupta ◽

Sabir Ali Mondal ◽

Hafizur Rahaman

Keyword(s):

Process Variations ◽

Current Reference ◽

Reference Circuit

Low power and hardware cost STUMPS BIST

2015 19th International Symposium on VLSI Design and Test ◽

10.1109/isvdat.2015.7208125 ◽

2015 ◽

Cited By ~ 1

Author(s):

N Ravi Kiran ◽

G Harish ◽

A Karthik ◽

Siva Yellampalli

Keyword(s):

Low Power ◽

Hardware Cost

Methodology for optimizing ESD protection for high speed LVDS based I/Os

2015 19th International Symposium on VLSI Design and Test ◽

10.1109/isvdat.2015.7208096 ◽

2015 ◽

Author(s):

Vishnuram Abhinav ◽

Amitabh Chatterjee ◽

Dheeraj Kumar Sinha ◽

Rajan Singh

Keyword(s):

High Speed ◽

Esd Protection

Out of order floating point coprocessor for RISC V ISA

2015 19th International Symposium on VLSI Design and Test ◽

10.1109/isvdat.2015.7208116 ◽

2015 ◽

Cited By ~ 9

Author(s):

Vinayak Patil ◽

Aneesh Raveendran ◽

P M Sobha ◽

A David Selvakumar ◽

D Vivian

Keyword(s):

Floating Point

An embedded framework for accurate object localization using center of gravity measure with mean shift procedure

2015 19th International Symposium on VLSI Design and Test ◽

10.1109/isvdat.2015.7208135 ◽

2015 ◽

Author(s):

J. G. Pandey ◽

A. Karmakar ◽

C. Shekhar ◽

S. Gurunarayanan

Keyword(s):

Mean Shift ◽

Center Of Gravity ◽

Object Localization

Implementation of high speed radix-10 parallel multiplier using Verilog

2015 19th International Symposium on VLSI Design and Test ◽

10.1109/isvdat.2015.7208073 ◽

2015 ◽

Author(s):

Sonam Negi ◽

Pitchaiah Madduri

Keyword(s):

High Speed ◽

Parallel Multiplier

Thermal aware AND-OR-XOR network synthesis

2015 19th International Symposium on VLSI Design and Test ◽

10.1109/isvdat.2015.7208047 ◽

2015 ◽

Author(s):

Priyanka Choudhury ◽

Debanjali Nath ◽

Vivek Rai ◽

Sambhu Nath Pradhan

Keyword(s):

Network Synthesis

A small bandwidth microelectromechanical ring resonator-based bandpass filter

2015 19th International Symposium on VLSI Design and Test ◽

10.1109/isvdat.2015.7208120 ◽

2015 ◽

Author(s):

Vinayak Pachkawade ◽

Rajesh Junghare ◽

Rajendra Patrikar

Keyword(s):

Bandpass Filter ◽

Ring Resonator ◽

Small Bandwidth

Implementation of high speed radix-10 parallel multiplier using Verilog

2015 19th International Symposium on VLSI Design and Test ◽

10.1109/isvdat.2015.7208074 ◽

2015 ◽

Author(s):

Sonam Negi ◽

Pitchaiah Madduri

Keyword(s):

High Speed ◽

Parallel Multiplier

A constructive heuristic for application mapping onto an express channel based Network-on-Chip

2015 19th International Symposium on VLSI Design and Test ◽

10.1109/isvdat.2015.7208147 ◽

2015 ◽

Author(s):

Sandeep D'souza ◽

J. Soumya ◽

Santanu Chattopadhyay

Keyword(s):

Network On Chip ◽

Application Mapping ◽

Constructive Heuristic ◽

On Chip

2015 19th International Symposium on VLSI Design and TestLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Improved supply regulation and temperature compensated current reference circuit with low process variations

Low power and hardware cost STUMPS BIST

Methodology for optimizing ESD protection for high speed LVDS based I/Os

Out of order floating point coprocessor for RISC V ISA

An embedded framework for accurate object localization using center of gravity measure with mean shift procedure

Implementation of high speed radix-10 parallel multiplier using Verilog

Thermal aware AND-OR-XOR network synthesis

A small bandwidth microelectromechanical ring resonator-based bandpass filter

Implementation of high speed radix-10 parallel multiplier using Verilog

A constructive heuristic for application mapping onto an express channel based Network-on-Chip

2015 19th International Symposium on VLSI Design and Test
Latest Publications