A high performance FPGA implementation of 256-bit Modular multiplication processor over GF(p)

2016 2nd IEEE International Conference on Computer and Communications (ICCC) ◽

10.1109/compcomm.2016.7924847 ◽

2016 ◽

Author(s):

Xiuze Dong ◽

Xiaonan Zhang

Keyword(s):

High Performance ◽

Fpga Implementation ◽

Modular Multiplication

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Erratum: A High Performance FPGA Implementation of 256-bit Elliptic Curve Cryptography Processor Over GF(p) [IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences Vol. E98.A (2015) , No. 3 pp.863-869]

IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ◽

10.1587/transfun.e98.a.1057_e1 ◽

2015 ◽

Vol E98.A (4) ◽

pp. 1057_e1-1057_e1

Author(s):

Xiang FENG ◽

Shuguo LI

Keyword(s):

Elliptic Curve ◽

Elliptic Curve Cryptography ◽

High Performance ◽

Fpga Implementation

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FPGA Implementation of an ECC Processor Using Edwards Curves and DFT Modular Multiplication

2021 12th International Conference on Information and Communication Systems (ICICS) ◽

10.1109/icics52457.2021.9464611 ◽

2021 ◽

Author(s):

Osama Al-Khaleel ◽

Selcuk Baktir ◽

Alptekin Kupcu

Keyword(s):

Fpga Implementation ◽

Modular Multiplication ◽

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Design and FPGA Implementation of High Performance 8-BIT Vedic Multiplier Using Reversible Logic Based Barrel Shifter

Proceedings of Second International Conference on Signal Processing, Image Processing and VLSI ◽

10.3850/978-981-09-6200-5_vlsi-74 ◽

2015 ◽

Author(s):

Abhilasha . ◽

Sudharshan . ◽

S.L. Anusha

Keyword(s):

High Performance ◽

Reversible Logic ◽

Fpga Implementation ◽

Vedic Multiplier ◽

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High-performance FPGA implementation of packet reordering for multiple TCP connections

2011 11th International Symposium on Communications & Information Technologies (ISCIT) ◽

10.1109/iscit.2011.6089757 ◽

2011 ◽

Author(s):

Feng Zhou ◽

Qingsheng Hu

Keyword(s):

High Performance ◽

Fpga Implementation ◽

Packet Reordering ◽

Tcp Connections

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High-performance FPGA implementation of DES using a novel method for implementing the key schedule

IEE Proceedings - Circuits Devices and Systems ◽

10.1049/ip-cds:20030574 ◽

2003 ◽

Vol 150 (5) ◽

pp. 373 ◽

Author(s):

M. McLoone ◽

J.V. McCanny

Keyword(s):

High Performance ◽

Fpga Implementation ◽

Key Schedule ◽

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High-performance, low-power architecture for scalable radix 2 montgomery modular multiplication algorithm

Canadian Journal of Electrical and Computer Engineering ◽

10.1109/cjece.2009.5599422 ◽

2009 ◽

Vol 34 (4) ◽

pp. 152-157 ◽

Author(s):

Atef Ibrahim ◽

Fayez Gebali ◽

Hamed El-Simary ◽

Amin Nassar

Keyword(s):

Low Power ◽

High Performance ◽

Modular Multiplication ◽

Multiplication Algorithm ◽

Montgomery Modular Multiplication ◽

Power Architecture

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High-Performance FPGA Implementation of Elliptic Curve Cryptography Processor over Binary Field GF(2^163)

Proceedings of the 2nd International Conference on Information Systems Security and Privacy ◽

10.5220/0005741604150422 ◽

2016 ◽

Author(s):

Md Selim Hossain ◽

Ehsan Saeedi ◽

Yinan Kong

Keyword(s):

Elliptic Curve ◽

Elliptic Curve Cryptography ◽

High Performance ◽

Fpga Implementation ◽

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Design and FPGA implementation of modular multiplication methods using cellular automata

5th International Conference on Design & Technology of Integrated Systems in Nanoscale Era ◽

10.1109/dtis.2010.5487586 ◽

2010 ◽

Author(s):

Z. Guitouni ◽

R. Chotin-Avot ◽

M. Machhout ◽

H. Mehrez ◽

R. Tourki

Keyword(s):

Cellular Automata ◽

Fpga Implementation ◽

Modular Multiplication

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High-performance scalable architecture for modular multiplication using a new digit-serial computation

Microelectronics Journal ◽

10.1016/j.mejo.2016.07.012 ◽

2016 ◽

Vol 55 ◽

pp. 169-178 ◽

Author(s):

Abdalhossein Rezai ◽

Parviz Keshavarzi

Keyword(s):

High Performance ◽

Modular Multiplication ◽

Scalable Architecture

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A Flexible, High-Performance FPGA Implementation of a Feed-Forward Equalizer for Optical Interconnects up to 112 Gb/s

Journal of Signal Processing Systems ◽

10.1007/s11265-016-1201-y ◽

2016 ◽

Vol 88 (2) ◽

pp. 107-125 ◽

Author(s):

Konstantinos Maragos ◽

Christos Spatharakis ◽

George Lentaris ◽

Panagiotis Kontzilas ◽

Stefanos Dris ◽

...

Keyword(s):

Optical Interconnects ◽

High Performance ◽

Fpga Implementation ◽

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