Design and Implementation of 64-bit Barrel Shifter with Reconfigurable SoC

In majority of embedded system-based applications, RISC Processors are popular. In these processors, barrel shifters are used for performing arithmetic and logical operations like multiplication, division, shift and rotation operations. The reason behind this will be a great advantage of speed. Because, a barrel shifter can perform shift and rotate operations within a single clock cycle where as in a normal shifter ‘n’ number of clock cycles are required for n-shift or rotate operations. As per the today’s need, in the design and development of 64-bit processors, 64-bit barrel shifters IPs are desired. Therefore, the RTL design of 64-bit barrel shifter, implementation and its verification process with an Artix 7 FPGA and front-end CAD tool is demonstrated in this paper. The main feature of the proposed work is power efficient design. It is implemented with 28nm technology and verified with 100MHz on board clock

Design and Analysis of an Energy Efficient 4-bit Barrel Shifter Circuits in 45nm Technology

In the design of any ALU, shift registers are generally used to perform addition (for carry movement), multiplication and for any floating point arithmetic. The shift registers currently used are made up of flip-flops which require n clock pulses for n shifts which can increase the delay. So, the aim is to design a high speed shift register i.e., barrel shifter which needs a single clock pulse for n shifts. In this paper, three types of Barrel shifter circuits called left rotator, right rotator and bidirectional rotators are designed in Cadence Virtuoso tool for 180nm and 45nm technology using universal gates (conventional model) and transmission gates. Compared to conventional design, the circuits of barrel shifters with transmission gates in 45nm technology require less power and reduced transistor count.The designed barrel shifter circuits are showing improved performance than conventional models already presented in the literature.