Purpose
– The purpose of this paper is to design and realize a high gain power amplifier (PA) with low output back-off power using the InGaP/GaAs HBT process for WCDMA applications from 1.85 to 1.91 GHz.
Design/methodology/approach
– A three stages cascaded PA is designed which observes a high power gain. A 100 mA of quiescent current helps the PA to operate efficiently. The final stage device dimension has been selected diligently in order to deliver a high output power. The inter-stage match between the driver and main stage has been designed to provide maximum power transfer. The output matching network is constructed to deliver a high linear output power which meets the WCDMA adjacent channel leakage ratio (ACLR) requirement of −33 dBc close to the 1 dB gain compression point.
Findings
– With the cascaded topology, a maximum 31.3 dB of gain is achieved at 1.9 GHz. S11 of less than −18 dB is achieved across the operating frequency band. The maximum output power is indicated to be 32.7 dBm. An ACLR of −33 dBc is achieved at maximum linear output power of 31 dBm.
Practical implications
– The designed PA is an excellent candidate to be employed in the WCDMA transmitter chain without the aid of additional driver amplifier and linearization circuits.
Originality/value
– In this work, a fully integrated GaAs HBT PA has been implemented which is capable to operate linearly close to its 1 dB gain compression point.
High-Gain and Low-Power Power Amplifier for 24-GHz Automotive Radars