System-level memory modeling for bus-based memory architecture exploration

2009 IEEE International Conference on Electro/Information Technology ◽

10.1109/eit.2009.5189619 ◽

2009 ◽

Author(s):

Zhongbo Cao ◽

Ramon Mercado ◽

Diane T. Rover

Keyword(s):

System Level ◽

Memory Architecture ◽

Architecture Exploration ◽

Memory Modeling

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On the Statistical Memory Architecture Exploration and Optimization

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015 ◽

10.7873/date.2015.0839 ◽

2015 ◽

Author(s):

Charalampos Antoniadis ◽

Georgios Karakonstantis ◽

Nestor Evmorfopoulos ◽

Andreas Burg ◽

George Stamoulis

Keyword(s):

Memory Architecture ◽

Architecture Exploration

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System-Level Specification and Architecture Exploration : an Avionics Codesign Application

Electronic Chips & Systems Design Languages ◽

10.1007/978-1-4757-3326-6_9 ◽

2001 ◽

pp. 111-120

Author(s):

François Cloute ◽

Jean-Noël Contensou ◽

Daniel Esteve ◽

Pascal Pampagnin ◽

Philippe Pons ◽

...

Keyword(s):

System Level ◽

Architecture Exploration

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The Guidelines and JPEG Encoder Study Case of System Level Architecture Exploration Using the SpecC Methodology

System on Chip Design Languages ◽

10.1007/978-1-4757-6674-5_13 ◽

2002 ◽

pp. 151-161 ◽

Author(s):

Lukai Cai ◽

Mike Olivarez ◽

Dan Gajski

Keyword(s):

System Level ◽

Architecture Exploration ◽

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A Case Study on Memory Architecture Exploration for Manycores on an FPGA

2018 Sixth International Symposium on Computing and Networking Workshops (CANDARW) ◽

10.1109/candarw.2018.00032 ◽

2018 ◽

Author(s):

Seiya Shirakuni ◽

Ittetsu Taniguchi ◽

Hiroyuki Tomiyama

Keyword(s):

Memory Architecture ◽

Architecture Exploration

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Memory Architecture Exploration for Power-Efficient 2D-Discrete Wavelet Transform

20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) ◽

10.1109/vlsid.2007.103 ◽

2007 ◽

Author(s):

Rahul Jain ◽

Preeti Panda

Keyword(s):

Wavelet Transform ◽

Discrete Wavelet Transform ◽

Discrete Wavelet ◽

Memory Architecture ◽

Power Efficient ◽

Architecture Exploration

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System-Level Bus-Based Communication Architecture Exploration Using a Pseudoparallel Algorithm

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2009.2021733 ◽

2009 ◽

Vol 28 (8) ◽

pp. 1213-1223 ◽

Author(s):

Lih-Yih Chiou ◽

Yi-Siou Chen ◽

Chih-Hsien Lee

Keyword(s):

System Level ◽

Communication Architecture ◽

Architecture Exploration

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Memory architecture exploration for programmable embedded systems; Peter Grun, Nikil Dutt, Alexandru Nicolau. Kluwer Academic Publishers, Boston. 2003. Hardcover, pp. 128, plus XVII, 116 euro. ISBN 1-4020-7324-0.

Microelectronics Reliability ◽

10.1016/j.microrel.2004.04.006 ◽

2004 ◽

Vol 44 (7) ◽

pp. 1205-1206

Author(s):

Mile Stojcev

Keyword(s):

Embedded Systems ◽

Memory Architecture ◽

Architecture Exploration

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APEX: access pattern based memory architecture exploration

International Symposium on System Synthesis (IEEE Cat. No.01EX526) ◽

10.1109/isss.2001.957908 ◽

2002 ◽

Author(s):

P. Grun ◽

N. Dutt ◽

A. Nicolau

Keyword(s):

Memory Architecture ◽

Access Pattern ◽

Architecture Exploration

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MAX: A Multi Objective Memory Architecture eXploration Framework for Embedded Systems-on-Chip

20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) ◽

10.1109/vlsid.2007.102 ◽

2007 ◽

Author(s):

T.S. Rajesh Kumar ◽

C.P. Ravikumar ◽

R. Govindarajan

Keyword(s):

Embedded Systems ◽

Memory Architecture ◽

Multi Objective ◽

Architecture Exploration ◽

Systems On Chip ◽

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Memory Architecture Exploration

Memory Issues in Embedded Systems-on-Chip ◽

10.1007/978-1-4615-5107-2_6 ◽

1999 ◽

pp. 137-154

Author(s):

Preeti Ranjan Panda ◽

Nikil Dutt ◽

Alexandru Nicolau

Keyword(s):

Memory Architecture ◽

Architecture Exploration

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