Proposing a Fast and Scalable Systolic Array for Matrix Multiplication

Author(s):  
Bahar Asgari ◽  
Ramyad Hadidi ◽  
Hyesoon Kim
2021 ◽  
Vol 15 ◽  
pp. 1-7
Author(s):  
Halil Snopce ◽  
Azir Aliu

This paper deals with the latency analysis in a twodimensional systolic array for matrix multiplication. The latency for all possible connection schemes is discussed. In this way there is obtained the lower bound of the latency that can be achieved using such arrays.


2004 ◽  
Vol 48 (1-2) ◽  
pp. 275-289 ◽  
Author(s):  
N.M. Stojanović ◽  
E.I. Milovanović ◽  
I. Stojmenović ◽  
T.. Milovanović ◽  
T.I. Tokić

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