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Low power image processing using MuCCRA-3: A Dynamically Reconfigurable Processor Array
2009 International Conference on Field-Programmable Technology
◽
10.1109/fpt.2009.5377614
◽
2009
◽
Cited By ~ 2
Author(s):
Masayuki Kimura
◽
Yoshiki Saito
◽
Toru Sano
◽
Masaru Kato
◽
Vasutan Tunbunheng
◽
...
Keyword(s):
Image Processing
◽
Low Power
◽
Processor Array
◽
Reconfigurable Processor
◽
Dynamically Reconfigurable
Download Full-text
Related Documents
Cited By
References
MuCCRA-3: A low power dynamically Reconfigurable Processor Array
2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC)
◽
10.1109/aspdac.2010.5419853
◽
2010
◽
Cited By ~ 2
Author(s):
Yoshiki Saito
◽
Toru Sano
◽
Masaru Kato
◽
Vasutan Tunbunheng
◽
Yoshihiro Yasuda
◽
...
Keyword(s):
Low Power
◽
Processor Array
◽
Reconfigurable Processor
◽
Dynamically Reconfigurable
Download Full-text
Reducing power consumption for Dynamically Reconfigurable Processor Array with Partially Fixed Configuration Mapping
2010 International Conference on Field-Programmable Technology
◽
10.1109/fpt.2010.5681431
◽
2010
◽
Cited By ~ 1
Author(s):
Kazuei Hironaka
◽
Masayuki Kimura
◽
Yoshiki Saito
◽
Toru Sano
◽
Masaru Kato
◽
...
Keyword(s):
Power Consumption
◽
Reducing Power
◽
Processor Array
◽
Reconfigurable Processor
◽
Dynamically Reconfigurable
Download Full-text
Folded Fat H-Tree: An Interconnection Topology for Dynamically Reconfigurable Processor Array
Embedded and Ubiquitous Computing - Lecture Notes in Computer Science
◽
10.1007/978-3-540-30121-9_29
◽
2004
◽
pp. 301-311
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Cited By ~ 3
Author(s):
Yutaka Yamada
◽
Hideharu Amano
◽
Michihiro Koibuchi
◽
Akiya Jouraku
◽
Kenichiro Anjo
◽
...
Keyword(s):
Processor Array
◽
Reconfigurable Processor
◽
Dynamically Reconfigurable
Download Full-text
Power Centric Application Mapping for Dynamically Reconfigurable Processor Array with Dual Vdd and Dual Vth
2011 International Conference on Reconfigurable Computing and FPGAs
◽
10.1109/reconfig.2011.70
◽
2011
◽
Cited By ~ 2
Author(s):
Kazuei Hironaka
◽
Hideharu Amano
Keyword(s):
Processor Array
◽
Reconfigurable Processor
◽
Dynamically Reconfigurable
◽
Application Mapping
Download Full-text
A study on interconnection networks of the Dynamically Reconfigurable Processor Array MuCCRA
2009 International Conference on Field-Programmable Technology
◽
10.1109/fpt.2009.5377694
◽
2009
◽
Cited By ~ 2
Author(s):
Masaru Kato
◽
Toru Sano
◽
Yoshihiro Yasuda
◽
Yoshiki Saito
◽
Hideharu Amano
Keyword(s):
Interconnection Networks
◽
Processor Array
◽
Reconfigurable Processor
◽
Dynamically Reconfigurable
Download Full-text
Reducing power for dynamically reconfigurable processor array by reducing number of reconfigurations
2011 International Conference on Field-Programmable Technology
◽
10.1109/fpt.2011.6132707
◽
2011
◽
Author(s):
Masayuki Kimura
◽
Kazuei Hironaka
◽
Hideharu Amano
Keyword(s):
Reducing Power
◽
Processor Array
◽
Reconfigurable Processor
◽
Dynamically Reconfigurable
Download Full-text
Extension of Memory Controller Equipped with MuCCRA-3-DP: Dynamically Reconfigurable Processor Array
2012 15th International Conference on Network-Based Information Systems
◽
10.1109/nbis.2012.87
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2012
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Cited By ~ 2
Author(s):
Toru Katagiri
◽
Kazuei Hironaka
◽
Hideharu Amano
Keyword(s):
Processor Array
◽
Memory Controller
◽
Reconfigurable Processor
◽
Dynamically Reconfigurable
Download Full-text
Implementation of dynamically reconfigurable processor DAPDNA-2
2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test, 2005. (VLSI-TSA-DAT).
◽
10.1109/vdat.2005.1500086
◽
2005
◽
Cited By ~ 21
Author(s):
T. Sato
◽
H. Watanabe
◽
K. Shiba
Keyword(s):
Reconfigurable Processor
◽
Dynamically Reconfigurable
Download Full-text
An adaptive cryptographic accelerator for IPsec on dynamically reconfigurable processor
Proceedings. 2005 IEEE International Conference on Field-Programmable Technology, 2005.
◽
10.1109/fpt.2005.1568541
◽
2006
◽
Cited By ~ 11
Author(s):
Y. Hasegawa
◽
S. Abe
◽
H. Matsutani
◽
H. Amano
◽
K. Anjo
◽
...
Keyword(s):
Reconfigurable Processor
◽
Dynamically Reconfigurable
Download Full-text
Low-power video decoding system using a reconfigurable processor
2012 IEEE International Conference on Consumer Electronics (ICCE)
◽
10.1109/icce.2012.6161960
◽
2012
◽
Author(s):
Joon Ho Song
◽
Won Chang Lee
◽
Doo Hyun Kim
◽
Do-Hyung Kim
◽
Shihwa Lee
Keyword(s):
Low Power
◽
Video Decoding
◽
Reconfigurable Processor
Download Full-text
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