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Effective legitimate skew driven clock tree routing
2003 5th International Conference on ASIC Proceedings (IEEE Cat No 03TH8690) ICASIC-03
◽
10.1109/icasic.2003.1277509
◽
2003
◽
Author(s):
Meng Zhao
◽
Yici Cai
◽
Xianlong Hong
◽
Yi Liu
◽
Liang Huang
Keyword(s):
Clock Tree
◽
Tree Routing
Download Full-text
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Rectilinear Steiner Clock Tree Routing Technique with Buffer Insertion in Presence of Obstacles
2015 28th International Conference on VLSI Design
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10.1109/vlsid.2015.81
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2015
◽
Author(s):
Partha Pratim Saha
◽
Sumonto Saha
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Tuhina Samanta
Keyword(s):
Buffer Insertion
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Clock Tree
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Tree Routing
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An algorithm for zero-skew clock tree routing with buffer insertion
Proceedings ED&TC European Design and Test Conference
◽
10.1109/edtc.1996.494154
◽
2002
◽
Cited By ~ 30
Author(s):
Y.P. Chen
◽
D.F. Wong
Keyword(s):
Buffer Insertion
◽
Clock Tree
◽
Tree Routing
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Zero Skew
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Pattern-Driven Clock Tree Routing with Via Minimization
2010 IEEE Computer Society Annual Symposium on VLSI
◽
10.1109/isvlsi.2010.82
◽
2010
◽
Author(s):
Ali M. Farhangi
◽
Asim J. Al-Khalili
◽
Dhamin Al-Khalili
Keyword(s):
Clock Tree
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Process variation aware clock tree routing
Proceedings of the 2003 international symposium on Physical design - ISPD '03
◽
10.1145/640000.640037
◽
2003
◽
Cited By ~ 22
Author(s):
Bing Lu
◽
Jiang Hu
◽
Gary Ellis
◽
Haihua Su
Keyword(s):
Process Variation
◽
Clock Tree
◽
Tree Routing
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Clock-tree routing with single buffer-block allocation strategy
48th Midwest Symposium on Circuits and Systems, 2005.
◽
10.1109/mwscas.2005.1594385
◽
2005
◽
Author(s):
Chuen-Yau Chen
◽
Pei-Chia Yang
Keyword(s):
Allocation Strategy
◽
Clock Tree
◽
Tree Routing
◽
Buffer Block
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A parallel algorithm for zero skew clock tree routing
Proceedings of the 1998 international symposium on Physical design - ISPD '98
◽
10.1145/274535.274552
◽
1998
◽
Cited By ~ 4
Author(s):
Zhaoyun Xing
◽
Prithviraj Banerjee
Keyword(s):
Parallel Algorithm
◽
Clock Tree
◽
Tree Routing
◽
Zero Skew
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Process variation robust clock tree routing
Proceedings of the 2005 conference on Asia South Pacific design automation - ASP-DAC '05
◽
10.1145/1120725.1120974
◽
2005
◽
Cited By ~ 3
Author(s):
Wai-Ching Douglas Lam
◽
Cheng-Kok Koh
Keyword(s):
Process Variation
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Clock Tree
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Reliable buffered clock tree routing algorithm with process variation tolerance
Science in China Series F Information Sciences
◽
10.1360/04yf0232
◽
2005
◽
Vol 48
(5)
◽
pp. 670
◽
Cited By ~ 2
Author(s):
Yici CAI
Keyword(s):
Process Variation
◽
Routing Algorithm
◽
Clock Tree
◽
Tree Routing
◽
Variation Tolerance
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Robust Clock Tree Routing in the Presence of Process Variations
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
◽
10.1109/tcad.2008.925776
◽
2008
◽
Vol 27
(8)
◽
pp. 1385-1397
◽
Cited By ~ 10
Author(s):
U. Padmanabhan
◽
J.M. Wang
◽
J. Hu
Keyword(s):
Process Variations
◽
Clock Tree
◽
Tree Routing
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Process variation robust clock tree routing
Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005.
◽
10.1109/aspdac.2005.1466235
◽
2005
◽
Cited By ~ 5
Author(s):
W.-C.D. Lam
◽
Cheng-Kok Koh
Keyword(s):
Process Variation
◽
Clock Tree
◽
Tree Routing
Download Full-text
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