HyperV: A High Performance Hypervisor for Virtualization of the Programmable Data Plane

Author(s):  
Cheng Zhang ◽  
Jun Bi ◽  
Yu Zhou ◽  
Abdul Basit Dogar ◽  
Jianping Wu
Keyword(s):  
2017 ◽  
Vol 13 (7) ◽  
pp. 155014771771967 ◽  
Author(s):  
Jianping Wang ◽  
Lijuan Ma ◽  
Wei Chen

The application based on big data is an important development trend of underwater acoustic sensor networks. However, traditional underwater acoustic sensor networks rely on the hardware infrastructure. The flexibility and scalability cannot be satisfied greatly. Due to the low performance of underwater acoustic sensor networks, it creates significant barriers to the implementation of big data. Software-defined network is regarded as a new infrastructure of next-generation network. It offers a novel solution for designing underwater acoustic sensor networks of high performance. In this article, a software-defined network–based solution is proposed to build the architecture of underwater acoustic sensor networks in big data. The design procedures of the data plane and control plane are described in detail. In the data plane, the works include the hardware design of OpenFlow-based virtual switch and the design of the physical layer based on software-defined radio. The hierarchical clustering technology and the node addressing techniques for designing media access control layer are well introduced. In the control plane, exploiting the hardware of the controller and designing the core module of controllers are presented as well. Through the study, it is supposed to maximize the capacity of underwater acoustic sensor networks, reduce the management complexity, and provide critical technical support for the high-performance underwater acoustic sensor networks.


Author(s):  
Marcus Vinicius Brito da Silva ◽  
Jonatas Adilson Marques ◽  
Luciano Paschoal Gaspary ◽  
Lisandro Zambenedetti Granville

AbstractInternet eXchange Points (IXPs) are Internet infrastructures composed of high-performance networks that allow multiple autonomous systems to exchange traffic. Given the challenges of managing the flows that cross an IXP, identifying elephant flows may help improve the quality of services provided to its participants. In this context, we leverage the new flexibility and resources of programmable data planes to identify elephant flows in IXP networks adaptively via the dynamic adjustment of thresholds. Our mechanism uses the information reported by the data plane to monitor network utilization in the control plane, calculating new thresholds based on previous flow sizes and durations percentiles and configuring them back into switches to support the local classification of flows. Thus, the thresholds are updated to make the identification process better aligned with the network behavior. The experimental results show that it is possible to identify and react to elephant flows quickly, less than 0.4ms, and efficiently, with only 98.4KB of data inserted into the network by the mechanism. In addition, the threshold updating mechanism achieved accuracy of up to 90% in our evaluation scenarios.


Electronics ◽  
2019 ◽  
Vol 8 (9) ◽  
pp. 950 ◽  
Author(s):  
Yue Jiang ◽  
Hongyi Chen ◽  
Xiangrui Yang ◽  
Zhigang Sun ◽  
Wei Quan

The southbound protocol of Software Defined Networking (SDN) enables the direct access into SDN switches which accelerates the innovation and deployment of network functions in the data plane. Correspondingly, SDN switches that support the new southbound protocol and provide high performance are developed continuously. Therefore, there is an increasing need for testing tools to test such equipment in terms of protocol correctness and performance. However, existing tools have deficiencies in flexibility for verifying the novel southbound protocol, time synchronization between the two planes, and supporting more testing functions with less resource consumption. In this paper, we present the concept of CPU & FPGA co-design Tester (CFT) for SDN switches, which provides flexible APIs for test cases of the control plane and high performance for testing functions in the data plane. We put forward an efficient scheduling algorithm to integrate the control plane and the data plane into a single pipeline which fundamentally solves the time asynchronization between these two planes. Due to the reconfigurable feature of our proposed pipeline, it becomes possible to perform different testing functions in one pipeline. Through a prototype implementation and evaluation, we reveal that the proposed CFT can verify the protocol correctness of SDN switches on the control plane while providing no-worse performance for tests on the data plane compared with commercial testers.


Author(s):  
Xiang Chen ◽  
Hongyan Liu ◽  
Qun Huang ◽  
Peiqiao Wang ◽  
Dong Zhang ◽  
...  
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