A high linearity folded cascode Low Noise Amplifier for wireless receivers

Author(s):  
Anand A. Kukde ◽  
S. Kumaravel ◽  
B. Venkataramani
2021 ◽  
Author(s):  
Ji-Seung Seo ◽  
Ji-Hye Hwang ◽  
Ki-Jin Kim ◽  
Gwang-Ho Ahn

2007 ◽  
Vol 49 (3) ◽  
pp. 524-526 ◽  
Author(s):  
Yo-Sheng Lin ◽  
Zheng-Hua Yang ◽  
Chi-Chen Chen ◽  
Tai-Cheng Chao

2011 ◽  
Vol 50 (4S) ◽  
pp. 04DE07 ◽  
Author(s):  
Takeshi Yoshida ◽  
Katsuya Sueishi ◽  
Atsushi Iwata ◽  
Kojiro Matsushita ◽  
Masayuki Hirata ◽  
...  

2015 ◽  
Vol 25 (8) ◽  
pp. 547-549 ◽  
Author(s):  
Taeyoung Chung ◽  
Hankyu Lee ◽  
Daechul Jeong ◽  
Jehyung Yoon ◽  
Bumman Kim

2013 ◽  
Vol 14 (1) ◽  
pp. 102-107 ◽  
Author(s):  
C. Stedler ◽  
S. Werker ◽  
R. Kronberger

Author(s):  
T. Kanthi ◽  
D. Sharath Babu Rao

This paper is about Low noise amplifier topologies based on 0.18µm CMOS technology. A common source stage with inductive degeneration, cascode stage and folded cascode stage is designed, simulated and the performance has been analyzed. The LNA’s are designed in 5GHz. The LNA of cascode stage of noise figure (NF) 2.044dB and power gain 4.347 is achieved. The simulations are done in cadence virtuoso spectre RF.


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