FPGA implementation of secure image compression with 2D-DCT using Verilog HDL

2014 ◽  
Author(s):  
B. Jeevan ◽  
C. Nagesh Bhatt ◽  
C. V. Krishna ◽  
K. Sivani
Keyword(s):  
Image Compression ◽  
Fpga Implementation ◽  
Verilog Hdl

scholarly journals FPGA Implementation of Interrupt Controller (8259) by using Verilog HDL

2012 ◽  
Vol 48 (6) ◽  
pp. 12-19
Author(s):  
L. PadmaSree ◽  
Bekkam Satheesh ◽  
N. Dhanalakshmi
Keyword(s):  
Fpga Implementation ◽  
Verilog Hdl

FPGA Implementation of Low Power Digital QPSK Modulator Using Verilog HDL

2013 ◽  
Vol 13 (3) ◽  
pp. 385-392 ◽  
Author(s):  
Asraf Mohamed Moubark ◽  
Mohd Alauddin Mohd Ali ◽  
Hilmi Sanusi ◽  
Sawal Md. Ali
Keyword(s):  
Low Power ◽  
Fpga Implementation ◽  
Verilog Hdl

Research and Realization of Key Algorithm of ADS-B Overlapping Test

2011 ◽  
Vol 403-408 ◽  
pp. 1555-1559
Author(s):  
Yu Yang ◽  
Chao Zhang
Keyword(s):  
Fpga Implementation ◽  
Verilog Hdl ◽  
Unique Character ◽  
Implementation Scheme

How to recognize the ADS-B messages is the key point of ADS-B receiver, and the preamble is the unique character of ADS-B messages. This paper describes a method for the overlapping test of the preamble detection. The FPGA implementation scheme is given in detail and the verilog HDL codes of this design is accomplished. The simulation result indicates that this method is viable and can detect the overlapping rapidly and accurately.

scholarly journals FPGA Implementation of Multispectral Image Compression for Satellite Images

2019 ◽  
Vol 8 (9) ◽  
pp. 561-567
Keyword(s):  
Image Compression ◽  
Satellite Images ◽  
Earth Satellite ◽  
Vital Role ◽  
Fpga Implementation ◽  
Multispectral Image ◽  
Complex Wavelet Transform ◽  
Multispectral Data ◽  
The Earth ◽  
Multispectral Image Compression

Multispectral image compression plays a vital role in remote sensing through satellites. Satellite images are more powerful approach to study the space information and research the geographical nature of the earth. Satellite images contains the huge amount of data and it requires more bandwidth for transmission and more memory for storage. Multispectral image compression reduces the size of the multispectral data and makes it easy for storage and transmission to the earth station form the satellite. The image is compressed by reducing the irrelevant and redundant part of data. This paper presents FPGA implementation of multispectral image compression using Dual Tree Complex Wavelet Transform (DTCWT) and Arithmetic Coding. This compression algorithm is implemented and simulated using MATLAB and XILINX ISE14.5 simulator. The FPGA Spartan -6 architecture is used to implement the algorithm. The proposed method gives better result in PSNR and MSE ratio as compared to DWT.

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