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Design of Low Power & High Speed Comparator of SAR ADC using 180nm Technology
2020 4th International Conference on Electronics, Communication and Aerospace Technology (ICECA)
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10.1109/iceca49313.2020.9297473
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2020
◽
Author(s):
Harshita kushwah
◽
R. S. Gamad
◽
R. C. Gurjar
Keyword(s):
Low Power
◽
High Speed
◽
Sar Adc
Download Full-text
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Considerations for Design of High Speed High Resolution Low Power SAR ADC for Direct RF Sampling Receivers
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Keyword(s):
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Design of Low Power, High Speed, Low Offset and Area Efficient Dynamic-Latch Comparator for SAR-ADC
2020 International Conference on Innovative Trends in Communication and Computer Engineering (ITCE)
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10.1109/itce48509.2020.9047792
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2020
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Author(s):
Kasi Bandla
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Harikrishnan A.
◽
Dipankar Pal
Keyword(s):
Low Power
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Sar Adc
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Low Offset
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Area Efficient
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A high-speed low-power SAR ADC in 40nm CMOS with combined energy-efficient techniques
IEICE Electronics Express
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10.1587/elex.18.20210156
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Author(s):
Yujia Huang
◽
Qiao Meng
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Fei Li
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Jie Wu
Keyword(s):
Low Power
◽
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A 500-MS/s 8-b Low Power High Speed Asynchronous SAR ADC in 40-nm CMOS
2019 5th International Conference on Frontiers of Signal Processing (ICFSP)
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10.1109/icfsp48124.2019.8938045
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2019
◽
Author(s):
Bowen Ding
◽
Peng Miao
◽
Fei Li
Keyword(s):
Low Power
◽
High Speed
◽
Sar Adc
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Asynchronous Sar
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High-speed and low-power logic for SAR ADC
2017 IEEE 17th International Conference on Communication Technology (ICCT)
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10.1109/icct.2017.8359818
◽
2017
◽
Author(s):
Daiguo Xu
◽
Shiliu Xu
Keyword(s):
Low Power
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High Speed
◽
Sar Adc
◽
Low Power Logic
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A fast low power window-opening logic for high speed SAR ADC
IEICE Electronics Express
◽
10.1587/elex.11.20140454
◽
2014
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◽
pp. 20140454-20140454
Author(s):
Yuxiao Lu
◽
Chaojie Fan
◽
Lu Sun
◽
Zhe Li
◽
Jianjun Zhou
Keyword(s):
Low Power
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High Speed
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Sar Adc
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Pipelining method for low-power and high-speed SAR ADC design
Analog Integrated Circuits and Signal Processing
◽
10.1007/s10470-016-0736-y
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2016
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◽
pp. 353-368
◽
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Author(s):
Ziba Fazel
◽
Saeed Saeedi
◽
Mojtaba Atarodi
Keyword(s):
Low Power
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High Speed
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A CMOS analog front-end for driving a high-speed SAR ADC in low-power ultrasound imaging systems
2016 29th IEEE International System-on-Chip Conference (SOCC)
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10.1109/socc.2016.7905458
◽
2016
◽
Cited By ~ 6
Author(s):
Taehoon Kim
◽
Han Yang
◽
Sangmin Shin
◽
Hyongmin Lee
◽
Suhwan Kim
Keyword(s):
Low Power
◽
Ultrasound Imaging
◽
High Speed
◽
Sar Adc
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Imaging Systems
◽
Power Ultrasound
◽
Front End
◽
Analog Front End
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Design of Low Power High-Speed SAR ADC-A Review
2019 3rd International Conference on Computing Methodologies and Communication (ICCMC)
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10.1109/iccmc.2019.8819791
◽
2019
◽
Author(s):
P. S Devitha
◽
Anuja George
Keyword(s):
Low Power
◽
High Speed
◽
Sar Adc
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Design of a high sensitivity and low power ultrasound receiver with a high-resolution SAR ADC for photoacoustic sensing and imaging
10.32657/10356/144400
◽
2020
◽
Author(s):
◽
Chuanshi Yang
Keyword(s):
High Resolution
◽
Low Power
◽
High Sensitivity
◽
Sar Adc
◽
Power Ultrasound
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