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Bipolar SCR ESD protection circuit for high speed submicron bipolar/BiCMOS circuits
Proceedings of International Electron Devices Meeting
◽
10.1109/iedm.1995.499209
◽
2002
◽
Cited By ~ 11
Author(s):
J.Z. Chen
◽
A. Amerasekera
◽
T. Vrotsos
Keyword(s):
High Speed
◽
Esd Protection
◽
Protection Circuit
Download Full-text
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Cited By
References
A novel ESD protection circuit applied in high-speed CMOS IC
2008 9th International Conference on Solid-State and Integrated-Circuit Technology
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10.1109/icsict.2008.4734542
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2008
◽
Author(s):
Bing Zhang
◽
Changchun Chai
◽
Yintang Yang
Keyword(s):
High Speed
◽
Esd Protection
◽
Cmos Ic
◽
Protection Circuit
Download Full-text
A fail-safe ESD protection circuit with 230 fF linear capacitance for high-speed/high-precision 0.18 μm CMOS I/O application
Digest. International Electron Devices Meeting,
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10.1109/iedm.2002.1175850
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2003
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Cited By ~ 5
Author(s):
J. Lin
◽
C. Duvvury
◽
B. Haroun
◽
I. Oguzman
◽
A. Somayaji
Keyword(s):
High Precision
◽
High Speed
◽
Esd Protection
◽
Protection Circuit
◽
Fail Safe
Download Full-text
Design of All-Directional ESD Protection circuit with SCR-based I/O and LIGBT-based Power clamp
2021 International Conference on Electronics, Information, and Communication (ICEIC)
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10.1109/iceic51217.2021.9369761
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2021
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Author(s):
Kyoung-Il Do
◽
Seung-Hoo Jin
◽
Byung-Seok Lee
◽
Je-Wook Woo
◽
Yong-Seo Koo
Keyword(s):
Esd Protection
◽
Protection Circuit
Download Full-text
ESD protection design for Giga-Hz high-speed I/O interfaces in a 130-nm CMOS process
2007 IEEE International SOC Conference
◽
10.1109/socc.2007.4545474
◽
2007
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Cited By ~ 1
Author(s):
Yuan-Wen Hsiao
◽
Ming-Dou Ker
◽
Po-Yen Chiu
◽
Chun Huang
◽
Yuh-Kuang Tseng
Keyword(s):
High Speed
◽
Cmos Process
◽
Esd Protection
Download Full-text
An ESD protection circuit for SOI technology using gate- and body-biased MOSFETs
IEEE International SOI Conference SOI-02
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10.1109/soi.2002.1044410
◽
2002
◽
Cited By ~ 1
Author(s):
Salman
◽
Mitra
◽
Ioannou
◽
Fechner
◽
Liu
Keyword(s):
Esd Protection
◽
Protection Circuit
◽
Soi Technology
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Methodology for optimizing ESD protection for high speed LVDS based I/Os
2015 19th International Symposium on VLSI Design and Test
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10.1109/isvdat.2015.7208096
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2015
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Author(s):
Vishnuram Abhinav
◽
Amitabh Chatterjee
◽
Dheeraj Kumar Sinha
◽
Rajan Singh
Keyword(s):
High Speed
◽
Esd Protection
Download Full-text
BSIM4-based lateral diode model for LNA co-designed with ESD protection circuit
2010 11th International Symposium on Quality Electronic Design (ISQED)
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10.1109/isqed.2010.5450396
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2010
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Author(s):
Ming-Ta Yang
◽
Yang Du
◽
Charles Teng
◽
Tony Chang
◽
Eugene Worley
◽
...
Keyword(s):
Esd Protection
◽
Protection Circuit
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The Design of LVDS Transmitter with ESD Protection Circuit using BiCMOS Technologies
2007 International Symposium on Signals, Circuits and Systems
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10.1109/isscs.2007.4292648
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2007
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Author(s):
Yong-Seo Koo
◽
Jo-Woon Lee
◽
Jae-Hyun Lee
◽
Kwang-Yeob Lee
◽
Jae-Chang Kwak
◽
...
Keyword(s):
Esd Protection
◽
Protection Circuit
Download Full-text
Design of high-reliability LDO with current limiting characteristics with built-in new high tolerance ESD protection circuit
IEICE Electronics Express
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10.1587/elex.10.20130516
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2013
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Vol 10
(20)
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pp. 20130516-20130516
Author(s):
Jin Woo Jung
◽
Yong Seo Koo
◽
Kwang Yeob Lee
Keyword(s):
High Reliability
◽
High Tolerance
◽
Current Limiting
◽
Esd Protection
◽
Protection Circuit
Download Full-text
Layout and Technology Influences on ESD Protection Circuit Design
On-Chip ESD Protection for Integrated Circuits - The International Series in Engineering and Computer Science
◽
10.1007/0-306-47618-5_7
◽
2006
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pp. 171-218
Keyword(s):
Circuit Design
◽
Esd Protection
◽
Protection Circuit
Download Full-text
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