An Area Efficient 64-bit Square Root Carry-select Adder for Low Power Applications

2005 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2005.1465528 ◽

2005 ◽

Author(s):

Yajuan He ◽

Chip-Hong Chang ◽

Jiangmin Gu

Keyword(s):

Low Power ◽

Square Root ◽

Carry Select Adder ◽

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Design of Optimized Low Power and Area Efficient Digital FIR Filter using Modified Group Structures based Square Root Carry Select Adder

Research Journal of Applied Sciences Engineering and Technology ◽

10.19026/rjaset.9.1381 ◽

2015 ◽

Vol 9 (2) ◽

pp. 84-90

Author(s):

S. Murugeswari ◽

S. Kaja Mohideen

Keyword(s):

Low Power ◽

Square Root ◽

Carry Select Adder ◽

Group Structures ◽

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High Speed, Low power and Area Efficient Processor Design Using Square Root Carry Select Adder

IOSR Journal of Electronics and Communication Engineering ◽

10.9790/2834-09271418 ◽

2014 ◽

Vol 9 (2) ◽

pp. 14-18

Author(s):

Dhanasekaran G ◽

◽

Parthasarathy N ◽

Achuthan B

Keyword(s):

Low Power ◽

Square Root ◽

Processor Design ◽

Carry Select Adder ◽

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Modified 16-b Square-root Low Power Area Efficient Carry Select Adder

Research Journal of Applied Sciences Engineering and Technology ◽

10.19026/rjaset.8.1221 ◽

2014 ◽

Vol 8 (21) ◽

pp. 2220-2226

Author(s):

R.P. Meenaakshi Sundhari ◽

R. Anita

Keyword(s):

Low Power ◽

Square Root ◽

Carry Select Adder ◽

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Implementation of Fast Low Power and Area Efficient Carry Select Adder

International Journal on Recent and Innovation Trends in Computing and Communication ◽

10.17762/ijritcc2321-8169.150463 ◽

2015 ◽

Vol 3 (4) ◽

pp. 2056-2059

Author(s):

Priya H ◽

Keyword(s):

Low Power ◽

Carry Select Adder ◽

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Design of Low-Power Square Root Carry Select Adder and Wallace Tree Multiplier Using Adiabatic Logic

Lecture Notes in Electrical Engineering - Emerging Research in Electronics, Computer Science and Technology ◽

10.1007/978-981-13-5802-9_67 ◽

2019 ◽

pp. 767-781

Author(s):

M. G. Ganavi ◽

B. S. Premananda

Keyword(s):

Low Power ◽

Square Root ◽

Wallace Tree ◽

Adiabatic Logic ◽

Carry Select Adder ◽

Wallace Tree Multiplier

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Low - Power and Area - Efficient Square – Root Carry Select Adders using Modified XOR Gate

Indian Journal of Science and Technology ◽

10.17485/ijst/2016/v9i5/87181 ◽

2016 ◽

Vol 9 (5) ◽

Author(s):

G . Ragunath ◽

R. Sakthivel

Keyword(s):

Low Power ◽

Square Root ◽

Xor Gate ◽

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Implementation of an ALU using modified carry select adder for low power and area-efficient applications

2015 International Conference on Computer and Computational Sciences (ICCCS) ◽

10.1109/iccacs.2015.7361316 ◽

2015 ◽

Author(s):

Priyanka Nautiyal ◽

Pitchaiah Madduri ◽

Sonam Negi

Keyword(s):

Low Power ◽

Carry Select Adder ◽

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Low power and area efficient Wallace tree multiplier using carry select adder with binary to excess-1 converter

2016 Conference on Advances in Signal Processing (CASP) ◽

10.1109/casp.2016.7746174 ◽

2016 ◽

Author(s):

R. Bala Sai Kesava ◽

B. Lingeswara Rao ◽

K. Bala Sindhuri ◽

N. Udaya Kumar

Keyword(s):

Low Power ◽

Wallace Tree ◽

Carry Select Adder ◽

Wallace Tree Multiplier ◽

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Low-Power and Area-Efficient Carry Select Adder

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2010.2101621 ◽

2012 ◽

Vol 20 (2) ◽

pp. 371-375 ◽

Author(s):

B. Ramkumar ◽

Harish M Kittur

Keyword(s):

Low Power ◽

Carry Select Adder ◽

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Low Power Square Root Carry Select Adder Using AVLS-TSPC-Based D Flip-Flop

10.5152/electr.2021.21024 ◽

2021 ◽

Author(s):

Premananda Belegahalli Siddaiah ◽

◽

Nikhil Kiran Jayanthi ◽

Samana Hanumanth Managoli ◽

◽

...

Keyword(s):

Low Power ◽

Square Root ◽

Flip Flop ◽

Carry Select Adder

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