Low Power Square Root Carry Select Adder Using AVLS-TSPC-Based D Flip-Flop

Low Power Square Root Carry Select Adder Using AVLS-TSPC-Based D Flip-Flop

10.5152/electrica.2021.21024 ◽

2021 ◽

Vol 22 (1) ◽

pp. 109-118

Author(s):

Premananda Belegahalli Siddaiah ◽

◽

Nikhil Kiran Jayanthi ◽

Samana Hanumanth Managoli ◽

◽

...

Keyword(s):

Low Power ◽

Square Root ◽

Flip Flop ◽

Design of Optimized Low Power and Area Efficient Digital FIR Filter using Modified Group Structures based Square Root Carry Select Adder

Research Journal of Applied Sciences Engineering and Technology ◽

10.19026/rjaset.9.1381 ◽

2015 ◽

Vol 9 (2) ◽

pp. 84-90

Author(s):

S. Murugeswari ◽

S. Kaja Mohideen

Keyword(s):

Low Power ◽

Fir Filter ◽

Square Root ◽

Carry Select Adder ◽

Group Structures ◽

An Area Efficient 64-bit Square Root Carry-select Adder for Low Power Applications

2005 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2005.1465528 ◽

2005 ◽

Cited By ~ 1

Author(s):

Yajuan He ◽

Chip-Hong Chang ◽

Jiangmin Gu

Keyword(s):

Low Power ◽

Square Root ◽

Carry Select Adder ◽

Lecture Notes in Electrical Engineering - Emerging Research in Electronics, Computer Science and Technology ◽

Design of Low-Power Square Root Carry Select Adder and Wallace Tree Multiplier Using Adiabatic Logic

10.1007/978-981-13-5802-9_67 ◽

2019 ◽

pp. 767-781

Author(s):

M. G. Ganavi ◽

B. S. Premananda

Keyword(s):

Low Power ◽

Square Root ◽

Wallace Tree ◽

Adiabatic Logic ◽

Carry Select Adder ◽

Wallace Tree Multiplier

Third International Conference on Current Trends in Engineering Science and Technology ICCTEST-2017 ◽

Design of 16-Bit Low Power Carry Select Adder using D-Flip Flop

10.21647/icctest/2017/48941 ◽

2017 ◽

Author(s):

Sharanabasappa ◽

P. Ravibabu

Keyword(s):

Low Power ◽

Flip Flop ◽

Design and Implementation of High Speed and Low Power Modified Square Root Carry Select Adder (MSQRTCSLA)

Research Journal of Applied Sciences Engineering and Technology ◽

10.19026/rjaset.12.2302 ◽

2016 ◽

Vol 12 (1) ◽

pp. 43-51

Author(s):

C. Uthayakumar ◽

B. Justus Rabi

Keyword(s):

Low Power ◽

High Speed ◽

Square Root ◽

Design And Implementation ◽

High Speed, Low power and Area Efficient Processor Design Using Square Root Carry Select Adder

IOSR Journal of Electronics and Communication Engineering ◽

10.9790/2834-09271418 ◽

2014 ◽

Vol 9 (2) ◽

pp. 14-18

Author(s):

Dhanasekaran G ◽

◽

Parthasarathy N ◽

Achuthan B

Keyword(s):

Low Power ◽

High Speed ◽

Square Root ◽

Processor Design ◽

Carry Select Adder ◽

2018 3rd International Conference on Circuits, Control, Communication and Computing (I4C) ◽

Design of Low Power and High-Speed 16-bit Square Root Carry Select Adder using AL

10.1109/cimca.2018.8739724 ◽

2018 ◽

Author(s):

Archit Bajpai ◽

A.R. Anurag ◽

G. Shakthivel ◽

B.S Premananda

Keyword(s):

Low Power ◽

High Speed ◽

Square Root ◽

Modified 16-b Square-root Low Power Area Efficient Carry Select Adder

Research Journal of Applied Sciences Engineering and Technology ◽

10.19026/rjaset.8.1221 ◽

2014 ◽

Vol 8 (21) ◽

pp. 2220-2226

Author(s):

R.P. Meenaakshi Sundhari ◽

R. Anita

Keyword(s):

Low Power ◽

Square Root ◽

Carry Select Adder ◽

Low power add-one circuit IPGL based high speed square root carry select adder

Indian Journal of Science and Technology ◽

10.17485/ijst/v14i9.343 ◽

2021 ◽

Vol 14 (9) ◽

pp. 776-786

Author(s):

B S Premananda ◽

◽

Archit Bajpai ◽

G Shakthivel ◽

A R Anurag

Keyword(s):

Low Power ◽

High Speed ◽

Square Root ◽