An 8–12GHz 0.92° Phase Error Quadrature Clock Generator Based on Two-Stage Poly Phase Filter with Intermediate Point Compensation

Author(s):  
Xiao Xiang ◽  
Weixin Gai ◽  
Linqi Shi ◽  
Ai He ◽  
Kai Sheng
Author(s):  
Wei-Chih Chen ◽  
Chin-Hua Wen ◽  
Chin-Ming Fu ◽  
Tsung-Hsien Tsai ◽  
Yu-Chi Chen ◽  
...  

2016 ◽  
Vol 24 (1) ◽  
pp. 95-101
Author(s):  
Jen-Chieh Liu ◽  
Pei-Ying Lee ◽  
Cheng-Hsing Hsu ◽  
Ching-Fang Tseng ◽  
Chao-Jen Huang ◽  
...  
Keyword(s):  

In this paper we discussed about different types of techniques used to design mixer, VGA and PLL circuits for Software Defined Radio (SDR). Software Defined Radio is a type of radio wherein some of the conventional hardware component is replace by a software component making it more versatile. Here we are concentrating on the hardware component of SDR. Various techniques in CMOS technology is reviewed here for example two stage amplifier, cascading of VGA blocks, PLL as a clock generator and conventional fine loop are discussed. By using CMOS technology, the IC chips can be developed within a small area and also power optimization can also be done.


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