A wide-range DLL-based clock generator with phase error calibration

Author(s):  
Kuo-Hsing Cheng ◽  
Chia-Wei Su ◽  
Meng-Jhe Wu ◽  
Yu-Ling Chang
Photonics ◽  
2021 ◽  
Vol 8 (7) ◽  
pp. 255
Author(s):  
Marie Tahon ◽  
Silvio Montresor ◽  
Pascal Picart

Digital holography is a very efficient technique for 3D imaging and the characterization of changes at the surfaces of objects. However, during the process of holographic interferometry, the reconstructed phase images suffer from speckle noise. In this paper, de-noising is addressed with phase images corrupted with speckle noise. To do so, DnCNN residual networks with different depths were built and trained with various holographic noisy phase data. The possibility of using a network pre-trained on natural images with Gaussian noise is also investigated. All models are evaluated in terms of phase error with HOLODEEP benchmark data and with three unseen images corresponding to different experimental conditions. The best results are obtained using a network with only four convolutional blocks and trained with a wide range of noisy phase patterns.


2011 ◽  
Vol 460-461 ◽  
pp. 837-842 ◽  
Author(s):  
Hai Yan Ni ◽  
Jian Ping Hu

This paper presents adiabatic flip-flops operating on near-threshold supply voltages. The near-threshold adiabatic flip-flops and sequential circuits are realized with improved CAL (Clocked Adiabatic Logic) circuits using a single-phase power clock. An auxiliary clock generator is used to obtain the non-overlap sinusoidal auxiliary signal pair. A near-threshold mode-10 counter is implemented. All circuits are simulated using Predictive Technology Model (PTM) 45nm process. The near-threshold adiabatic circuits attain large energy savings over a wide range of frequencies, as compared with conventional static CMOS logic circuits.


2016 ◽  
Vol 24 (1) ◽  
pp. 95-101
Author(s):  
Jen-Chieh Liu ◽  
Pei-Ying Lee ◽  
Cheng-Hsing Hsu ◽  
Ching-Fang Tseng ◽  
Chao-Jen Huang ◽  
...  
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