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40-Gb/s amplifier and ESD protection circuit in 0.18-/spl mu/m CMOS technology
IEEE Journal of Solid-State Circuits
◽
10.1109/jssc.2004.835639
◽
2004
◽
Vol 39
(12)
◽
pp. 2389-2396
◽
Cited By ~ 104
Author(s):
S. Galal
◽
B. Razavi
Keyword(s):
Cmos Technology
◽
Esd Protection
◽
Protection Circuit
Download Full-text
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ESD protection circuit for 8.5Gbps I/Os in 90nm CMOS technology
2009 IEEE Custom Integrated Circuits Conference
◽
10.1109/cicc.2009.5280729
◽
2009
◽
Author(s):
H. Sarbishaei
◽
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Novel input ESD protection circuit with substrate-triggering technique in a 0.25-μm shallow-trench-isolation CMOS technology
ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187)
◽
10.1109/iscas.1998.706879
◽
2002
◽
Author(s):
Ming-Dou Ker
◽
Tung-Yang Chen
◽
Chung-Yu Wu
◽
H. Tang
◽
Kuan-Cheng Su
◽
...
Keyword(s):
Cmos Technology
◽
Shallow Trench Isolation
◽
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◽
Esd Protection
◽
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Multi‐function ESD protection circuit for UHF RFID devices in CMOS technology
Electronics Letters
◽
10.1049/el.2012.4354
◽
2013
◽
Vol 49
(7)
◽
pp. 453-455
◽
Cited By ~ 3
Author(s):
A. Boni
◽
A. Facen
◽
M. Bigi
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Cmos Technology
◽
Uhf Rfid
◽
Esd Protection
◽
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Design of a Distributed Amplifier with On-chip ESD Protection Circuit in 130 nm SOI CMOS Technology
2007 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems
◽
10.1109/smic.2007.322782
◽
2007
◽
Cited By ~ 2
Author(s):
M. Moussa
◽
M. Kaamouchi
◽
G. Wybo
◽
A. Bens
◽
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◽
...
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◽
Distributed Amplifier
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◽
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◽
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ESD protection circuit for V-band RF applications in a 65nm CMOS technology
IOP Conference Series Materials Science and Engineering
◽
10.1088/1757-899x/600/1/012025
◽
2019
◽
Vol 600
◽
pp. 012025
Author(s):
Allenn C. Lowaton
◽
Lemuel Fil L. Bañez
Keyword(s):
Cmos Technology
◽
V Band
◽
Esd Protection
◽
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40Gb/s amplifier and ESD protection circuit in 0.18μm CMOS technology
2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)
◽
10.1109/isscc.2004.1332803
◽
2004
◽
Cited By ~ 13
Author(s):
S. Galal
◽
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Keyword(s):
Cmos Technology
◽
Esd Protection
◽
Protection Circuit
Download Full-text
Design of Compact ESD Protection Circuit for V-Band RF Applications in a 65-nm CMOS Technology
IEEE Transactions on Device and Materials Reliability
◽
10.1109/tdmr.2012.2188405
◽
2012
◽
Vol 12
(3)
◽
pp. 554-561
◽
Cited By ~ 2
Author(s):
Chun-Yu Lin
◽
Li-Wei Chu
◽
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◽
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Keyword(s):
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◽
V Band
◽
Esd Protection
◽
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The Design of Bi-CMOS LVDS Output Buffer with ESD Protection Circuit Using 90nm CMOS Technology
10.1109/enics.2008.23
◽
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◽
Author(s):
Yongseo Koo
◽
Kwangyeob Lee
◽
Jaechang Kwack
◽
Jongil Won
◽
Kuidong Kim
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Cmos Technology
◽
Output Buffer
◽
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◽
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Design of All-Directional ESD Protection circuit with SCR-based I/O and LIGBT-based Power clamp
2021 International Conference on Electronics, Information, and Communication (ICEIC)
◽
10.1109/iceic51217.2021.9369761
◽
2021
◽
Author(s):
Kyoung-Il Do
◽
Seung-Hoo Jin
◽
Byung-Seok Lee
◽
Je-Wook Woo
◽
Yong-Seo Koo
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Esd Protection
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An ESD protection circuit for SOI technology using gate- and body-biased MOSFETs
IEEE International SOI Conference SOI-02
◽
10.1109/soi.2002.1044410
◽
2002
◽
Cited By ~ 1
Author(s):
Salman
◽
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◽
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◽
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◽
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